> Increased FAILS are LMUL = M4. I have analyzed the codegen. Looks
> reasonable.
>
> Moreover, When I removed 'popcount_64' and test, all passed no matter
> apply this patch or not.
>
> I think it is because popcount64 is buggy in RV32, this patch trigger
> LMUL = 4 bug already existed that we
ursday, October 26, 2023 9:27 AM
To: Patrick O'Neill ; gcc-patches
Cc: kito.cheng ; Kito.cheng ;
jeffreyalaw ; Robin Dapp
Subject: Re: Re: [PATCH] RISC-V: Add AVL propagation PASS for RVV
auto-vectorization
I think it's QEMU issue:
line 15: 1520161 Aborted (core d
, 2023 9:27 AM
To: Patrick O'Neill ; gcc-patches
Cc: kito.cheng ; Kito.cheng ;
jeffreyalaw ; Robin Dapp
Subject: Re: Re: [PATCH] RISC-V: Add AVL propagation PASS for RVV
auto-vectorization
I think it's QEMU issue:
line 15: 1520161 Aborted (core dumped)
QEMU_CPU="
C: kito.cheng; Kito.cheng; jeffreyalaw; Robin Dapp
Subject: Re: [PATCH] RISC-V: Add AVL propagation PASS for RVV auto-vectorization
On 10/25/23 17:49, juzhe.zh...@rivai.ai wrote:
FAIL: gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-5.c -O3 -ftree-vectorize
--param riscv-autovec-lmul=dynamic scan-
: 2023-10-26 08:37
To: juzhe.zh...@rivai.ai; gcc-patches
CC: kito.cheng; Kito.cheng; jeffreyalaw; Robin Dapp
Subject: Re: [PATCH] RISC-V: Add AVL propagation PASS for RVV auto-vectorization
Hi Juzhe,
I tested on glibc rv32/64gcv qemu.
Applied patch to/comparing with 668c4c3783970e7adf0591396b6d0d
> +using namespace rtl_ssa;
> +using namespace riscv_vector;
> +
> +/* The AVL propagation instructions and corresponding preferred AVL.
> + It will be updated during the analysis. */
> +static hash_map *avlprops;
Maybe put into member data of pass_avlprop?
> +
> +const pass_data pass_data_avl
:* kito.cheng <mailto:kito.ch...@gmail.com>; kito.cheng
<mailto:kito.ch...@sifive.com>; jeffreyalaw
<mailto:jeffreya...@gmail.com>; rdapp.gcc
<mailto:rdapp@gmail.com>; Juzhe-Zhong
<mailto:juzhe.zh...@rivai.ai>
*Subject:* [PATCH] RISC-V: Add AVL
cheng; jeffreyalaw; rdapp.gcc; Juzhe-Zhong
Subject: [PATCH] RISC-V: Add AVL propagation PASS for RVV auto-vectorization
This patch addresses the redundant AVL/VL toggling in RVV partial
auto-vectorization
which is a known issue for a long time and I finally find the time to address
it.
Consider a s
This patch addresses the redundant AVL/VL toggling in RVV partial
auto-vectorization
which is a known issue for a long time and I finally find the time to address
it.
Consider a simple vector addition operation:
https://godbolt.org/z/7hfGfEjW3
void
foo (int *__restrict a,
int *__restrict
