Re: [PATCH] PR middle-end/60281

2014-02-20 Thread lin zuojian
于 2014年02月20日 19:05, Ramana Radhakrishnan 写道: >>> Or, if ARM supports unaligned loads/stores using special instructions, >>> perhaps you should also benchmark the alternative of not realigning, but >>> instead making sure those unaligned instructions are used for the shadow >>> memory loads/stores

Re: [PATCH] PR middle-end/60281

2014-02-20 Thread Ramana Radhakrishnan
>> Or, if ARM supports unaligned loads/stores using special instructions, >> perhaps you should also benchmark the alternative of not realigning, but >> instead making sure those unaligned instructions are used for the shadow >> memory loads/stores in the asan prologue/epilogue. > I have tried to u

Re: [PATCH] PR middle-end/60281

2014-02-20 Thread Jakub Jelinek
On Thu, Feb 20, 2014 at 06:46:21PM +0800, lin zuojian wrote: > Oh, you may think my patch have not violated STRICT_ALIGNMENT.My patch > doesn't realign stack_pointer,but virtual_stack_vars,although they may > share the same position mostly. > As you can see,the code emitted just make the stack 8 by

Re: [PATCH] PR middle-end/60281

2014-02-20 Thread lin zuojian
Oh, you may think my patch have not violated STRICT_ALIGNMENT.My patch doesn't realign stack_pointer,but virtual_stack_vars,although they may share the same position mostly. As you can see,the code emitted just make the stack 8 bytes aligned. > You mean that for the prologues right now on ARM we e

Re: [PATCH] PR middle-end/60281

2014-02-20 Thread Jakub Jelinek
On Thu, Feb 20, 2014 at 10:21:12AM +0100, Jakub Jelinek wrote: > > > Or, if ARM supports unaligned loads/stores using special instructions, > > > perhaps you should also benchmark the alternative of not realigning, but > > > instead making sure those unaligned instructions are used for the shadow >

Re: [PATCH] PR middle-end/60281

2014-02-20 Thread Jakub Jelinek
On Thu, Feb 20, 2014 at 05:13:36PM +0800, lin zuojian wrote: > > You certainly don't want to do any of the extra aligning > > on non-strict alignment targets, so all the changes must be > > if (STRICT_ALIGNMENT) guarded, as they are quite expensive (you need one > > extra register in that case). >

Re: [PATCH] PR middle-end/60281

2014-02-20 Thread lin zuojian
If you don't mind my realigning on STRICT_ALIGNMENT machines,I will make patch v2 soon. >> On Thu, Feb 20, 2014 at 04:19:12PM +0800, lin zuojian wrote: >>> Without aligning the asan stack base,base will only 64-bit aligned in >>> ARM machines. >>> But asan require 256-bit aligned base because of th

Re: [PATCH] PR middle-end/60281

2014-02-20 Thread lin zuojian
> On Thu, Feb 20, 2014 at 04:19:12PM +0800, lin zuojian wrote: >> Without aligning the asan stack base,base will only 64-bit aligned in >> ARM machines. >> But asan require 256-bit aligned base because of this: >> 1.right shift take ASAN_SHADOW_SHIFT(which is 3) bits are zeros >> 2.store multiple/

Re: [PATCH] PR middle-end/60281

2014-02-20 Thread Jakub Jelinek
On Thu, Feb 20, 2014 at 04:19:12PM +0800, lin zuojian wrote: > Without aligning the asan stack base,base will only 64-bit aligned in > ARM machines. > But asan require 256-bit aligned base because of this: > 1.right shift take ASAN_SHADOW_SHIFT(which is 3) bits are zeros > 2.store multiple/load mul

[PATCH] PR middle-end/60281

2014-02-20 Thread lin zuojian
Without aligning the asan stack base,base will only 64-bit aligned in ARM machines. But asan require 256-bit aligned base because of this: 1.right shift take ASAN_SHADOW_SHIFT(which is 3) bits are zeros 2.store multiple/load multiple instructions require the other 2 bits are zeros that add up low