Hi Jakub!
On 2023-06-30T18:37:59+0200, Jakub Jelinek wrote:
> On Fri, Jun 30, 2023 at 08:45:38PM +0800, Kito Cheng wrote:
>> Hmmm, I think maybe what we need is to leverage C++ language features
>> to declare enum with underlying types like that:
>>
>> enum machine_mode : uint16_t
>
> What would
On Fri, Jun 30, 2023 at 08:45:38PM +0800, Kito Cheng wrote:
> Hmmm, I think maybe what we need is to leverage C++ language features
> to declare enum with underlying types like that:
>
> enum machine_mode : uint16_t
What would be the advantage of doing that?
I mean, on most hosts using unsigned r
Hi!
On 2023-06-30T20:45:38+0800, Kito Cheng wrote:
>> On 2023-05-13T16:44:41+0800, Kito Cheng via Gcc-patches
>> wrote:
>> > Tried this patch and I ran into some issues, some variables are using
>> > unsigned char to hold machine mode and will have problems when the
>> > number of modes is larg
> On 2023-05-13T16:44:41+0800, Kito Cheng via Gcc-patches
> wrote:
> > Tried this patch and I ran into some issues, some variables are using
> > unsigned char to hold machine mode and will have problems when the
> > number of modes is larger than 255...
> >
> > And here is the fix:
>
> > --- a/gc
Hi!
On 2023-05-13T16:44:41+0800, Kito Cheng via Gcc-patches
wrote:
> Tried this patch and I ran into some issues, some variables are using
> unsigned char to hold machine mode and will have problems when the
> number of modes is larger than 255...
>
> And here is the fix:
> --- a/gcc/genmodes.c
Subject: Re: [PATCH] Machine_Mode: Extend machine_mode from 8 to 16 bits
pan2...@intel.com writes:
> diff --git a/gcc/rtl-ssa/accesses.h b/gcc/rtl-ssa/accesses.h index
> c5180b9308a..c2103a5cb5c 100644
> --- a/gcc/rtl-ssa/accesses.h
> +++ b/gcc/rtl-ssa/accesses.h
> @@ -215,7 +21
pan2...@intel.com writes:
> diff --git a/gcc/rtl-ssa/accesses.h b/gcc/rtl-ssa/accesses.h
> index c5180b9308a..c2103a5cb5c 100644
> --- a/gcc/rtl-ssa/accesses.h
> +++ b/gcc/rtl-ssa/accesses.h
> @@ -215,7 +215,11 @@ private:
>
>// The values returned by the accessors above.
>unsigned int m_
From: Pan Li
We are running out of the machine_mode(8 bits) in RISC-V backend. Thus
we would like to extend the machine_mode bit size from 8 to 16 bits.
However, it is sensitive to extend the memory size in common structure
like tree or rtx. This patch would like to extend the machine_mode bits
t
: Extend machine_mode from 8 to 16 bits
Hi Pan:
Tried this patch and I ran into some issues, some variables are using unsigned
char to hold machine mode and will have problems when the number of modes is
larger than 255...
And here is the fix:
diff --git a/gcc/genmodes.cc b/gcc/genmodes.cc index
Hi Pan:
Tried this patch and I ran into some issues, some variables are using
unsigned char to hold machine mode and will have problems when the
number of modes is larger than 255...
And here is the fix:
diff --git a/gcc/genmodes.cc b/gcc/genmodes.cc
index 715787b8f483..55ac2adb5596 100644
---
On 12 May 2023 08:49:53 CEST, Richard Biener via Gcc-patches
wrote:
>> gcc/ChangeLog:
>>
>> * combine.cc (struct reg_stat_type): Extended machine mode to 16 bits.
>> * cse.cc (struct qty_table_elem): Ditto.
>> (struct table_elt): Ditto.
>> (struct set): Ditto.
>> * geno
il.com; rguent...@suse.de
> Subject: Re: [PATCH] Machine_Mode: Extend machine_mode from 8 to 16
> bits
>
> pan2...@intel.com writes:
>> From: Pan Li
>>
>> We are running out of the machine_mode(8 bits) in RISC-V backend.
>> Thus we would like to extend the
e.de
> Subject: Re: [PATCH] Machine_Mode: Extend machine_mode from 8 to 16 bits
>
> pan2...@intel.com writes:
>> From: Pan Li
>>
>> We are running out of the machine_mode(8 bits) in RISC-V backend. Thus
>> we would like to extend the machine mode bit size from 8
machine_mode from 8 to 16 bits
pan2...@intel.com writes:
> From: Pan Li
>
> We are running out of the machine_mode(8 bits) in RISC-V backend. Thus
> we would like to extend the machine mode bit size from 8 to 16 bits.
> However, it is sensitive to extend the memory size in common structure
pan2...@intel.com writes:
> From: Pan Li
>
> We are running out of the machine_mode(8 bits) in RISC-V backend. Thus
> we would like to extend the machine mode bit size from 8 to 16 bits.
> However, it is sensitive to extend the memory size in common structure
> like tree or rtx. This patch would l
On Fri, 12 May 2023, pan2...@intel.com wrote:
> From: Pan Li
>
> We are running out of the machine_mode(8 bits) in RISC-V backend. Thus
> we would like to extend the machine mode bit size from 8 to 16 bits.
> However, it is sensitive to extend the memory size in common structure
> like tree or r
From: Pan Li
We are running out of the machine_mode(8 bits) in RISC-V backend. Thus
we would like to extend the machine mode bit size from 8 to 16 bits.
However, it is sensitive to extend the memory size in common structure
like tree or rtx. This patch would like to extend the machine mode bits
t
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