On Sat, 2025-07-05 at 14:10 -0500, Segher Boessenkool wrote:
> Hi!
>
> On Sat, Jul 05, 2025 at 11:10:05PM +0800, Xi Ruoyao wrote:
> > Possibly this is https://gcc.gnu.org/PR101882. Specifically comment 5
> > from Segher:
> >
> > "The LRA change is correct AFAICS. But combine makes a change that
Hi!
On Sat, Jul 05, 2025 at 11:10:05PM +0800, Xi Ruoyao wrote:
> Possibly this is https://gcc.gnu.org/PR101882. Specifically comment 5
> from Segher:
>
> "The LRA change is correct AFAICS. But combine makes a change that
> violates the earlyclobber... I need to do something about that, too."
On Sat, 2025-07-05 at 17:55 +0800, Xi Ruoyao wrote:
> On Sat, 2025-07-05 at 11:20 +0800, Lulu Cheng wrote:
> > For the gcc.target/loongarch/bitwise-shift-reassoc-clobber.c,
> > some extensions are eliminated in ext_dce in commit r16-1835.
> >
> > This will result in the following rtx being generat
On Sat, 2025-07-05 at 11:20 +0800, Lulu Cheng wrote:
> For the gcc.target/loongarch/bitwise-shift-reassoc-clobber.c,
> some extensions are eliminated in ext_dce in commit r16-1835.
>
> This will result in the following rtx being generated in the
> combine pass:
> (insn 12 10 15 2 (set (reg/v:DI 23
For the gcc.target/loongarch/bitwise-shift-reassoc-clobber.c,
some extensions are eliminated in ext_dce in commit r16-1835.
This will result in the following rtx being generated in the
combine pass:
(insn 12 10 15 2 (set (reg/v:DI 23 $r23 [ x ])
(sign_extend:DI (plus:SI
(su
