On Tue, Jun 7, 2022 at 6:56 AM liuhongt via Gcc-patches
wrote:
>
> 21114(define_insn_and_split "ssse3_palignrdi"
> 21115 [(set (match_operand:DI 0 "register_operand" "=y,x,Yv")
> 21116(unspec:DI [(match_operand:DI 1 "register_operand" "0,0,Yv")
> 21117(match_operand:DI
21114(define_insn_and_split "ssse3_palignrdi"
21115 [(set (match_operand:DI 0 "register_operand" "=y,x,Yv")
21116(unspec:DI [(match_operand:DI 1 "register_operand" "0,0,Yv")
21117(match_operand:DI 2 "register_mmxmem_operand"
"ym,x,Yv")
21118(match_o