On Fri, May 13, 2022 at 12:32:22PM -0500, Segher Boessenkool wrote:
> On Fri, May 13, 2022 at 11:08:48AM -0400, Michael Meissner wrote:
> > Add zero_extendditi2. Improve lxvr*x code generation.
>
>
>
> Nothing in this pass haas anything to do with the subject. Which is a
> good thing, because
On Fri, 2022-05-13 at 11:08 -0400, Michael Meissner wrote:
> Add zero_extendditi2. Improve lxvr*x code generation.
>
Hi,
> Subject: Re: [PATCH] Delay splitting addti3/subti3 until first split
pass.
Subject does not seem to match contents?
> This pattern adds zero_extendditi
On Fri, May 13, 2022 at 11:08:48AM -0400, Michael Meissner wrote:
> Add zero_extendditi2. Improve lxvr*x code generation.
Nothing in this pass haas anything to do with the subject. Which is a
good thing, because not expanding addti3 etc. to RTL that mimics the
machine insns is not acceptable a
Add zero_extendditi2. Improve lxvr*x code generation.
This pattern adds zero_extendditi2 so that if we are extending DImode that
is in a GPR register to TImode in a vector register, the compiler can
generate MTVSRDDD.
In addition the patterns for generating lxvr{b,h,w,d}x were tuned to allow
loa