Re: [PATCH] Add niagara3 and niagara4 cpu types.

2011-09-05 Thread David Miller
From: David Miller Date: Mon, 05 Sep 2011 11:24:10 -0400 (EDT) > From: Eric Botcazou > Date: Mon, 5 Sep 2011 09:20:35 +0200 > >> Great, thanks (superfluous gcc/ in the ChangeLog). No improvements to the >> SPARC port have been documented in http://gcc.gnu.org/gcc-4.7/changes.html >> yet, so

Re: [PATCH] Add niagara3 and niagara4 cpu types.

2011-09-05 Thread David Miller
From: Eric Botcazou Date: Mon, 5 Sep 2011 09:20:35 +0200 > Great, thanks (superfluous gcc/ in the ChangeLog). No improvements to the > SPARC port have been documented in http://gcc.gnu.org/gcc-4.7/changes.html > yet, so I'm going to write something down. Thanks Eric, and thanks also for findi

Re: [PATCH] Add niagara3 and niagara4 cpu types.

2011-09-05 Thread Eric Botcazou
> For now I schedule Niagara3 like Niagara2, and that's pretty accurate. > Niagara4 will be a different beast scheduling wise, so I've left it > out of the chips niagara2.md matches. > > 2011-09-04 David S. Miller > > * gcc/config/sparc/sparc-opts.h (PROCESSOR_NIAGARA3, > PROCESSOR_N

[PATCH] Add niagara3 and niagara4 cpu types.

2011-09-04 Thread David Miller
This provides a framework to optimize for these chips and also to enable support for several new instructions available on these processors. I currently have patches to add VIS2, VIS3, POPC, and FMAF (fused multiply-add) instruction support. I also plan on adding support for the HPC instructions