"Moore, Catherine" writes:
>> -Original Message-
>> From: Moore, Catherine
>> Subject: RE: [PATCH] Workaround errata for the PMC-Sierra RM7000 cpu.
>>
>> writes:
>> > >> -Original Message-
>> > >> From: Ric
> -Original Message-
> From: Moore, Catherine
> Subject: RE: [PATCH] Workaround errata for the PMC-Sierra RM7000 cpu.
>
> writes:
> > >> -Original Message-
> > >> From: Richard Sandiford [mailto:rdsandif...@googlemail.com]
> > >>
> -Original Message-
> From: Richard Sandiford [mailto:rdsandif...@googlemail.com]
> Sent: Thursday, October 10, 2013 1:21 PM
> To: Moore, Catherine
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH] Workaround errata for the PMC-Sierra RM7000 cpu.
>
> &q
On Thu, 10 Oct 2013, Richard Sandiford wrote:
> Ideally opcodes/mips*.c would have a flag to mark load instructions,
> but all we have at the moment are flags to mark load delays, which means
> that LD and some other load instructions don't have them. So I can think
> of three options:
>
> (1) T
"Moore, Catherine" writes:
>> -Original Message-
>> From: Richard Sandiford [mailto:rdsandif...@googlemail.com]
>> Subject: Re: [PATCH] Workaround errata for the PMC-Sierra RM7000 cpu.
>>
>> "Moore, Catherine" writes:
>> > H
"Moore, Catherine" writes:
> Hi Richard,
>
> This patch implements a workaround for errors on the PMC-Sierra RM7000
> cpu while executing the dmult or dmultu instruction. The workaround
> is to insert three nops after the dmult/dmultu.
Do you have any more details? E.g. does "dmult $4,$5;addiu
Hi Richard,
This patch implements a workaround for errors on the PMC-Sierra RM7000 cpu
while executing the dmult or dmultu instruction. The workaround is to insert
three nops after the dmult/dmultu.
Does this look okay to commit?
Thanks,
Catherine
gcc/
2013-10-09 Catherine Moore
