On 01/30/15 03:07, Uros Bizjak wrote:
On Fri, Jan 30, 2015 at 7:12 AM, Jeff Law wrote:
Hello!
So here's the updated patch which handles all 4 testcases from the PR as
well as a couple of my own.
@@ -0,0 +1,33 @@
+/* PR 15184 first two tests, plus two addition ones. */
+/* { dg-do compile
On 01/30/15 03:24, Jakub Jelinek wrote:
On Fri, Jan 30, 2015 at 11:23:38AM +0100, Uros Bizjak wrote:
On Fri, Jan 30, 2015 at 11:13 AM, Jakub Jelinek wrote:
/* Each function should compile down to a byte move from
the input register into x, possibly at an offset within x. */
-/* { dg-f
On Fri, Jan 30, 2015 at 11:23:38AM +0100, Uros Bizjak wrote:
> On Fri, Jan 30, 2015 at 11:13 AM, Jakub Jelinek wrote:
>
> >> /* Each function should compile down to a byte move from
> >> the input register into x, possibly at an offset within x. */
> >> -/* { dg-final { scan-assembler-times
On Fri, Jan 30, 2015 at 11:13 AM, Jakub Jelinek wrote:
>> /* Each function should compile down to a byte move from
>> the input register into x, possibly at an offset within x. */
>> -/* { dg-final { scan-assembler-times "\tmovb\t%al, x" 4 } } */
>> +/* { dg-final { scan-assembler-times "mo
On Fri, Jan 30, 2015 at 11:07:45AM +0100, Uros Bizjak wrote:
> --- gcc.target/i386/pr15184-1.c (revision 220273)
> +++ gcc.target/i386/pr15184-1.c (working copy)
> @@ -1,11 +1,10 @@
> /* PR 15184 first two tests, plus two addition ones. */
> -/* { dg-do compile } */
> -/* { dg-options
On Fri, Jan 30, 2015 at 7:12 AM, Jeff Law wrote:
>> Hello!
>>
>>> So here's the updated patch which handles all 4 testcases from the PR as
>>> well as a couple of my own.
>>
>>
>> @@ -0,0 +1,33 @@
>> +/* PR 15184 first two tests, plus two addition ones. */
>> +/* { dg-do compile } */
>> +/* { dg
Hi Jeff,
The tests gcc.target/i386/pr15184-[12].c fail on darwin. Grepping for movb, I
get
movb%al, (%edx)
movb%al, 1(%edx)
movb%al, 2(%edx)
movb%al, 3(%edx)
TIA
Dominique
On 01/29/15 07:44, Uros Bizjak wrote:
Hello!
So here's the updated patch which handles all 4 testcases from the PR as well
as a couple of my own.
@@ -0,0 +1,33 @@
+/* PR 15184 first two tests, plus two addition ones. */
+/* { dg-do compile } */
+/* { dg-options "-O2 -m32 -march=pentiumpro"
On 01/29/15 13:13, Segher Boessenkool wrote:
On Thu, Jan 29, 2015 at 07:30:31AM -0700, Jeff Law wrote:
@@ -2643,6 +2644,34 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1,
rtx_insn *i0,
|| GET_CODE (src) == LSHIFTRT)
nshift++;
}
+
+ /* If I0
On Thu, Jan 29, 2015 at 6:56 AM, Jakub Jelinek wrote:
> On Thu, Jan 29, 2015 at 03:54:34PM +0100, Uros Bizjak wrote:
>> On Thu, Jan 29, 2015 at 3:47 PM, Jakub Jelinek wrote:
>>
>> >> > So here's the updated patch which handles all 4 testcases from the PR
>> >> > as well as a couple of my own.
>>
On Thu, Jan 29, 2015 at 07:30:31AM -0700, Jeff Law wrote:
> @@ -2643,6 +2644,34 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1,
> rtx_insn *i0,
> || GET_CODE (src) == LSHIFTRT)
> nshift++;
> }
> +
> + /* If I0 loads a memory and I3 sets the same memo
On Thu, Jan 29, 2015 at 03:54:34PM +0100, Uros Bizjak wrote:
> On Thu, Jan 29, 2015 at 3:47 PM, Jakub Jelinek wrote:
>
> >> > So here's the updated patch which handles all 4 testcases from the PR as
> >> > well as a couple of my own.
> >>
> >> @@ -0,0 +1,33 @@
> >> +/* PR 15184 first two tests,
On Thu, Jan 29, 2015 at 3:47 PM, Jakub Jelinek wrote:
>> > So here's the updated patch which handles all 4 testcases from the PR as
>> > well as a couple of my own.
>>
>> @@ -0,0 +1,33 @@
>> +/* PR 15184 first two tests, plus two addition ones. */
>> +/* { dg-do compile } */
>> +/* { dg-options
On Thu, Jan 29, 2015 at 03:44:25PM +0100, Uros Bizjak wrote:
> Hello!
>
> > So here's the updated patch which handles all 4 testcases from the PR as
> > well as a couple of my own.
>
> @@ -0,0 +1,33 @@
> +/* PR 15184 first two tests, plus two addition ones. */
> +/* { dg-do compile } */
> +/* {
Hello!
> So here's the updated patch which handles all 4 testcases from the PR as well
> as a couple of my own.
@@ -0,0 +1,33 @@
+/* PR 15184 first two tests, plus two addition ones. */
+/* { dg-do compile } */
+/* { dg-options "-O2 -m32 -march=pentiumpro" } */
No, we don't want -m32 in dg-opt
So here's the updated patch which handles all 4 testcases from the PR as
well as a couple of my own.
As discussed earlier this week, we have to twiddle the heuristic for
when to enable 4 insn combinations to make 4-insn combos where the first
insn is a load and the last a store profitable.
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