Hi Renlin,
On 12/11/15 09:29, Renlin Li wrote:
Hi all,
This is a simply patch to adjust the assembly output for addsi3_compare_op2 rtx
pattern in ARM backend.
According to the constraints, it's the second alternative which allows the
second operand to be a constant.
The original pattern will
Hi all,
This is a simply patch to adjust the assembly output for
addsi3_compare_op2 rtx pattern in ARM backend.
According to the constraints, it's the second alternative which allows
the second operand to be a constant.
The original pattern will trigger an ICE when the third alternative is
c
