On Tue, Dec 15, 2015 at 10:59 AM, Wilco Dijkstra wrote:
> ping
>
>> -Original Message-
>> From: Wilco Dijkstra [mailto:wilco.dijks...@arm.com]
>> Sent: 19 November 2015 18:12
>> To: gcc-patches@gcc.gnu.org
>> Subject: [PATCH][ARM] Enable fusion of AES i
ping
> -Original Message-
> From: Wilco Dijkstra [mailto:wilco.dijks...@arm.com]
> Sent: 19 November 2015 18:12
> To: gcc-patches@gcc.gnu.org
> Subject: [PATCH][ARM] Enable fusion of AES instructions
>
> Enable instruction fusion of AES instructions on ARM for Cor
ping
> -Original Message-
> From: Wilco Dijkstra [mailto:wilco.dijks...@arm.com]
> Sent: 19 November 2015 18:12
> To: gcc-patches@gcc.gnu.org
> Subject: [PATCH][ARM] Enable fusion of AES instructions
>
> Enable instruction fusion of AES instructions on ARM for Cor
Yvan Roux wrote:
> I've a question regarding Cortex-A35, I don't see the same
> documentation for it on ARM website as we have for the other cores
> yet, but is AES fusion not beneficial for it or is it planned to do it
> later ?
It's early days for Cortex-A35, GCC 6 just has initial support. When
Hi Wilco,
> Enable instruction fusion of AES instructions on ARM for Cortex-A53 and
> Cortex-A57.
I've a question regarding Cortex-A35, I don't see the same
documentation for it on ARM website as we have for the other cores
yet, but is AES fusion not beneficial for it or is it planned to do it
la
Enable instruction fusion of AES instructions on ARM for Cortex-A53 and
Cortex-A57.
OK for commit?
ChangeLog:
2015-11-20 Wilco Dijkstra
* gcc/config/arm/arm.c (arm_cortex_a53_tune): Add AES fusion.
(arm_cortex_a57_tune): Likewise.
(aarch_macro_fusion_pair_p): Add supp
