On 20/09/12 16:49, Ulrich Weigand wrote:
> Richard Earnshaw wrote:
>
>> Hmm, this is going to cause bottlenecks on Cortex-A15: writing a Neon
>> single-precision register and then reading it back as a double-precision
>> value will cause scheduling problems.
>
> Ok, that is a problem ...
>
>> Th
Richard Earnshaw wrote:
> Hmm, this is going to cause bottlenecks on Cortex-A15: writing a Neon
> single-precision register and then reading it back as a double-precision
> value will cause scheduling problems.
Ok, that is a problem ...
> The awkward thing here is that the shift only uses the bo
On 18/09/12 18:06, Ulrich Weigand wrote:
> Hello,
>
> a while ago Andrew Stubbs posted a patch to use NEON registers
> and instructions to perform 64-bit integer shifts:
> http://gcc.gnu.org/ml/gcc-patches/2012-05/msg01645.html
>
> As Andrew no longer works on ARM, I've now picked this up and
> r
Hello,
a while ago Andrew Stubbs posted a patch to use NEON registers
and instructions to perform 64-bit integer shifts:
http://gcc.gnu.org/ml/gcc-patches/2012-05/msg01645.html
As Andrew no longer works on ARM, I've now picked this up and
reworked it a bit:
- Updated for current mainline changes
On 23/02/12 20:36, Andrew Stubbs wrote:
On 21/02/12 15:23, Andrew Stubbs wrote:
On 06/02/12 13:13, Andrew Stubbs wrote:
This patch adds DImode shift support in NEON registers/instructions.
The patch causes delays any lowering until the split2 pass, after the
register allocator has chosen wheth
On 21/02/12 15:23, Andrew Stubbs wrote:
On 06/02/12 13:13, Andrew Stubbs wrote:
This patch adds DImode shift support in NEON registers/instructions.
The patch causes delays any lowering until the split2 pass, after the
register allocator has chosen whether to do the shift in NEON (VFP)
register
On 06/02/12 13:13, Andrew Stubbs wrote:
This patch adds DImode shift support in NEON registers/instructions.
The patch causes delays any lowering until the split2 pass, after the
register allocator has chosen whether to do the shift in NEON (VFP)
registers, or in core-registers.
The core-regist
On Mon 06 Feb 2012 13:18:34 GMT, Jakub Jelinek wrote:
On Mon, Feb 06, 2012 at 01:13:58PM +, Andrew Stubbs wrote:
Anyway, is this patch OK?
Are you asking approval for 4.8, or 4.7? For the latter this doesn't
seem to be a regression bugfix that would be suitable for stage4.
Yes, sorry, t
On Mon, Feb 06, 2012 at 01:13:58PM +, Andrew Stubbs wrote:
> Anyway, is this patch OK?
Are you asking approval for 4.8, or 4.7? For the latter this doesn't
seem to be a regression bugfix that would be suitable for stage4.
> 2012-02-06 Andrew Stubbs
>
> gcc/
> * config/arm/arm
This patch adds DImode shift support in NEON registers/instructions.
The patch causes delays any lowering until the split2 pass, after the
register allocator has chosen whether to do the shift in NEON (VFP)
registers, or in core-registers.
The core-registers case depends on the patch I previo
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