Re: [PATCH][AArch64] PR target/78362: Make sure to only take REGNO of a register

2016-11-30 Thread James Greenhalgh
On Wed, Nov 16, 2016 at 04:57:29PM +, Kyrill Tkachov wrote: > Hi all, > > As the PR says we have an RTL checking failure that occurs when building > libgcc for aarch64. The expander code for addsi3 takes the REGNO of a SUBREG > in operands[1]. The > three operands in the failing case are: > {

Re: [PATCH][AArch64] PR target/78362: Make sure to only take REGNO of a register

2016-11-30 Thread Ramana Radhakrishnan
On Wed, Nov 16, 2016 at 4:57 PM, Kyrill Tkachov wrote: > Hi all, > > As the PR says we have an RTL checking failure that occurs when building > libgcc for aarch64. > The expander code for addsi3 takes the REGNO of a SUBREG in operands[1]. The > three operands > in the failing case are: > {(reg:SI

Re: [PATCH][AArch64] PR target/78362: Make sure to only take REGNO of a register

2016-11-30 Thread Kyrill Tkachov
Ping. Thanks, Kyrill On 23/11/16 14:16, Kyrill Tkachov wrote: Ping. https://gcc.gnu.org/ml/gcc-patches/2016-11/msg01664.html Thanks, Kyrill On 16/11/16 16:57, Kyrill Tkachov wrote: Hi all, As the PR says we have an RTL checking failure that occurs when building libgcc for aarch64. The exp

Re: [PATCH][AArch64] PR target/78362: Make sure to only take REGNO of a register

2016-11-23 Thread Kyrill Tkachov
Ping. https://gcc.gnu.org/ml/gcc-patches/2016-11/msg01664.html Thanks, Kyrill On 16/11/16 16:57, Kyrill Tkachov wrote: Hi all, As the PR says we have an RTL checking failure that occurs when building libgcc for aarch64. The expander code for addsi3 takes the REGNO of a SUBREG in operands[1].

[PATCH][AArch64] PR target/78362: Make sure to only take REGNO of a register

2016-11-16 Thread Kyrill Tkachov
Hi all, As the PR says we have an RTL checking failure that occurs when building libgcc for aarch64. The expander code for addsi3 takes the REGNO of a SUBREG in operands[1]. The three operands in the failing case are: {(reg:SI 78), (subreg:SI (reg:DI 77) 0), (subreg:SI (reg:DI 73 [ ivtmp.9 ]) 0