226247.
Thanks,
James
> > -----Original Message-----
> > From: Wilco Dijkstra [mailto:wdijk...@arm.com]
> > Sent: 27 April 2015 14:37
> > To: GCC Patches
> > Subject: [PATCH][AArch64] Improve spill code - swap order in shl pattern
> >
> > ---
> >
ping
> -Original Message-
> From: Wilco Dijkstra [mailto:wdijk...@arm.com]
> Sent: 27 April 2015 14:37
> To: GCC Patches
> Subject: [PATCH][AArch64] Improve spill code - swap order in shl pattern
>
> Various instructions are supported as integer operations as well
On Mon, Apr 27, 2015 at 02:37:12PM +0100, Wilco Dijkstra wrote:
> Various instructions are supported as integer operations as well as SIMD on
> AArch64. When register pressure is high, lra-constraints inserts spill code
> without taking the allocation class into account, and basically chooses the
>
Various instructions are supported as integer operations as well as SIMD on
AArch64. When register
pressure is high, lra-constraints inserts spill code without taking the
allocation class into
account, and basically chooses the first available pattern that matches. Since
this instruction has
the
