On Tue, Dec 06, 2016 at 05:00:25PM +, James Greenhalgh wrote:
> On Fri, Nov 11, 2016 at 01:14:15PM +, Wilco Dijkstra wrote:
> > Richard Earnshaw wrote:
> >
> > > Has this patch been truncated? The last line above looks to be part-way
> > > through a hunk.
> >
> > Oops sorry, it seems the
On Fri, Nov 11, 2016 at 01:14:15PM +, Wilco Dijkstra wrote:
> Richard Earnshaw wrote:
>
> > Has this patch been truncated? The last line above looks to be part-way
> > through a hunk.
>
> Oops sorry, it seems the last few lines are missing. Here is the full version:
OK.
Thanks,
James
>
>
ping
From: Wilco Dijkstra
Sent: 11 November 2016 13:14
To: Richard Earnshaw; GCC Patches
Cc: nd
Subject: Re: [PATCH][AArch64] Improve TI mode address offsets
Richard Earnshaw wrote:
> Has this patch been truncated? The last line above looks to be part-way
> through a hunk.
Oops
Richard Earnshaw wrote:
> Has this patch been truncated? The last line above looks to be part-way
> through a hunk.
Oops sorry, it seems the last few lines are missing. Here is the full version:
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index
3045e6d6447d5c1860fe
On 10/11/16 17:16, Wilco Dijkstra wrote:
> Improve TI mode address offsets - these may either use LDP of 64-bit or
> LDR of 128-bit, so we need to use the correct intersection of offsets.
> When splitting a large offset into base and offset, use a signed 9-bit
> unscaled offset.
>
> Remove the Um
Improve TI mode address offsets - these may either use LDP of 64-bit or
LDR of 128-bit, so we need to use the correct intersection of offsets.
When splitting a large offset into base and offset, use a signed 9-bit
unscaled offset.
Remove the Ump constraint on movti and movtf instructions as this
