On 15/02/17 15:30, Richard Earnshaw (lists) wrote:
On 15/02/17 15:03, Kyrill Tkachov wrote:
Hi Richard,
On 15/02/17 15:00, Richard Earnshaw (lists) wrote:
On 03/02/17 17:12, Kyrill Tkachov wrote:
Hi all,
While evaluating Maxim's SW prefetch patches [1] I noticed that the
aarch64 prefetch pa
On 15/02/17 15:03, Kyrill Tkachov wrote:
> Hi Richard,
>
> On 15/02/17 15:00, Richard Earnshaw (lists) wrote:
>> On 03/02/17 17:12, Kyrill Tkachov wrote:
>>> Hi all,
>>>
>>> While evaluating Maxim's SW prefetch patches [1] I noticed that the
>>> aarch64 prefetch pattern is
>>> overly restrictive i
Hi Richard,
On 15/02/17 15:00, Richard Earnshaw (lists) wrote:
On 03/02/17 17:12, Kyrill Tkachov wrote:
Hi all,
While evaluating Maxim's SW prefetch patches [1] I noticed that the
aarch64 prefetch pattern is
overly restrictive in its address operand. It only accepts simple
register addressing
On 03/02/17 17:12, Kyrill Tkachov wrote:
> Hi all,
>
> While evaluating Maxim's SW prefetch patches [1] I noticed that the
> aarch64 prefetch pattern is
> overly restrictive in its address operand. It only accepts simple
> register addressing modes.
> In fact, the PRFM instruction accepts almost a
> On Feb 3, 2017, at 8:12 PM, Kyrill Tkachov
> wrote:
>
> Hi all,
>
> While evaluating Maxim's SW prefetch patches [1] I noticed that the aarch64
> prefetch pattern is
> overly restrictive in its address operand. It only accepts simple register
> addressing modes.
> In fact, the PRFM instruct
Hi all,
While evaluating Maxim's SW prefetch patches [1] I noticed that the aarch64
prefetch pattern is
overly restrictive in its address operand. It only accepts simple register
addressing modes.
In fact, the PRFM instruction accepts almost all modes that a normal 64-bit LDR
supports.
The res
