On 10 June 2014 15:29, Christophe Lyon wrote:
> Hello,
>
> This commit (211211) causes gcc.target/aarch64/vect-mull.c execution
> test to FAIL for target aarch64_be-none-elf.
> (tested using qemu)
Yep, that is exactly what Bin said in his original submission..
/Marcus
>>> On Wed, May 28, 2014 a
Hello,
This commit (211211) causes gcc.target/aarch64/vect-mull.c execution
test to FAIL for target aarch64_be-none-elf.
(tested using qemu)
Christophe.
On 3 June 2014 13:08, Marcus Shawcroft wrote:
> On 28 May 2014 08:30, Bin.Cheng wrote:
>> Missing patch.
>>
>> On Wed, May 28, 2014 at 3:02
On Wed, Jun 4, 2014 at 7:18 PM, Charles Baylis
wrote:
> On 4 June 2014 10:06, Charles Baylis wrote:
>> On 4 June 2014 03:11, Bin.Cheng wrote:
>>
>>> Yes, If there is a PR, I can evaluate how this can help and ask
>>> release maintainer for approval.
>>
>> I'll reduce the test case and create one
On 4 June 2014 10:06, Charles Baylis wrote:
> On 4 June 2014 03:11, Bin.Cheng wrote:
>
>> Yes, If there is a PR, I can evaluate how this can help and ask
>> release maintainer for approval.
>
> I'll reduce the test case and create one shortly
I have created PR61411 with a reduced test case.
On 4 June 2014 03:11, Bin.Cheng wrote:
> Yes, If there is a PR, I can evaluate how this can help and ask
> release maintainer for approval.
I'll reduce the test case and create one shortly
On Wed, Jun 4, 2014 at 1:50 AM, Marcus Shawcroft
wrote:
>
>
>
>
>> On 3 Jun 2014, at 18:08, Charles Baylis wrote:
>>
>>> On 3 June 2014 12:08, Marcus Shawcroft wrote:
>>> On 28 May 2014 08:30, Bin.Cheng wrote:
> So is it OK?
>
>
> 2014-05-28 Bin Cheng
>
>* con
> On 3 Jun 2014, at 18:08, Charles Baylis wrote:
>
>> On 3 June 2014 12:08, Marcus Shawcroft wrote:
>> On 28 May 2014 08:30, Bin.Cheng wrote:
So is it OK?
2014-05-28 Bin Cheng
* config/aarch64/aarch64.c (aarch64_classify_address)
(aarch
On 3 June 2014 12:08, Marcus Shawcroft wrote:
> On 28 May 2014 08:30, Bin.Cheng wrote:
>>> So is it OK?
>>>
>>>
>>> 2014-05-28 Bin Cheng
>>>
>>> * config/aarch64/aarch64.c (aarch64_classify_address)
>>> (aarch64_legitimize_reload_address): Support full addressing modes
>>>
On 28 May 2014 08:30, Bin.Cheng wrote:
> Missing patch.
>
> On Wed, May 28, 2014 at 3:02 PM, bin.cheng wrote:
>> Hi,
>> I was surprised that GCC didn't support addressing modes like
>> [REG+OFF]/[REG_REG] for instructions ldr/str in vectorization scenarios.
>> The generated assembly is bad since
Missing patch.
On Wed, May 28, 2014 at 3:02 PM, bin.cheng wrote:
> Hi,
> I was surprised that GCC didn't support addressing modes like
> [REG+OFF]/[REG_REG] for instructions ldr/str in vectorization scenarios.
> The generated assembly is bad since all address expressions have to be
> computed out
Hi,
I was surprised that GCC didn't support addressing modes like
[REG+OFF]/[REG_REG] for instructions ldr/str in vectorization scenarios.
The generated assembly is bad since all address expressions have to be
computed outside of memory reference. The root cause is because aarch64
effectively reje
11 matches
Mail list logo
