On Thu, Nov 10, 2016 at 10:05:25AM -0600, Segher Boessenkool wrote:
> Hi Mike,
>
> > I have built the spec 2006 CPU benchmark suite with these changes, and the
> > power8 (ISA 2.07) code generation does not change.
>
> Very good to hear :-)
>
> Just some nits; okay for trunk with that fixed:
>
Hi Mike,
> I have built the spec 2006 CPU benchmark suite with these changes, and the
> power8 (ISA 2.07) code generation does not change.
Very good to hear :-)
Just some nits; okay for trunk with that fixed:
> +(define_split
> + [(set (match_operand:EXTHI 0 "altivec_register_operand" "")
> +
Of course it would help, if I actually attached the patches:
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Index: gcc/config/rs6000/rs6000.md
The PowerPC ISA 3.0 (power9) has new instructions that make it feasible to
allow QImode and HImode to be allocated to vector registers. The new
instructions are:
* load byte with zero extend
* load half word with zero extend
* store byte
* store half word
* extract byte from v
