On Fri, Jul 01, 2016 at 08:04:46PM -0500, Bill Schmidt wrote:
> Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions.
> Is this ok for trunk, and eventual 6.2 backport?
Okay for both. Just a few cosmetics:
> + /* If this is a VSX register, generate the special mfvsrd
Hi,
I've revised the patch to address the previous concerns. rs6000_split_signbit
has
been greatly simplified since SF and DF modes are not currently of interest.
The
use of -static-libgcc did indeed turn out to be leftover from long-ago necessity
and is no longer needed. I also updated the s
On Fri, Jul 01, 2016 at 04:37:35PM -0500, Bill Schmidt wrote:
> Hi Segher,
>
> > On Jun 29, 2016, at 4:43 PM, Segher Boessenkool
> > wrote:
> >
> > Why does this need -static-libgcc?
>
> Mike, can you please respond to this? I was curious about this also
> but neglected to ask you.
The origi
Hi Segher,
> On Jun 29, 2016, at 4:43 PM, Segher Boessenkool
> wrote:
>
> Hi,
>
> On Tue, Jun 28, 2016 at 04:44:08PM -0500, Bill Schmidt wrote:
>> +void
>> +rs6000_split_signbit (rtx dest, rtx src)
>> +{
>> + machine_mode d_mode = GET_MODE (dest);
>> + machine_mode s_mode = GET_MODE (src);
>
Hi,
On Tue, Jun 28, 2016 at 04:44:08PM -0500, Bill Schmidt wrote:
> +void
> +rs6000_split_signbit (rtx dest, rtx src)
> +{
> + machine_mode d_mode = GET_MODE (dest);
> + machine_mode s_mode = GET_MODE (src);
> + rtx dest_di = (d_mode == DImode) ? dest : gen_lowpart (DImode, dest);
> + rtx shif
Hi,
Currently GCC generates a store followed by a load for __builtin_signbit for
both IBM long double and IEEE-128 floating point. This patch, originating with
Michael Meissner, adds logic to instead use direct move instructions. The
original patch also added direct-move support for single- and
