On 8/16/17 5:56 PM, Peter Bergner wrote:
> On 8/16/17 5:30 PM, Segher Boessenkool wrote:
> I'll make the above changes and commit after another quick test cycle.
Testing the changes came up clean, so I committed it. Thanks.
Peter
On Wed, Aug 16, 2017 at 05:56:09PM -0500, Peter Bergner wrote:
> On 8/16/17 5:30 PM, Segher Boessenkool wrote:
> > On Mon, Aug 14, 2017 at 04:28:25PM -0500, Peter Bergner wrote:
> >> + mr %0,%L1; mr %L0,%1
> >
> >mr %0,%L1\;mr %L0,%1
>
> So you want the ';' escaped and the space removed? O
On 8/16/17 5:30 PM, Segher Boessenkool wrote:
> On Mon, Aug 14, 2017 at 04:28:25PM -0500, Peter Bergner wrote:
>> + mr %0,%L1; mr %L0,%1
>
>mr %0,%L1\;mr %L0,%1
So you want the ';' escaped and the space removed? Ok.
>> + [(set (match_operand:VSX_TI 0 "int_reg_operand" "")
>
> You can
On Mon, Aug 14, 2017 at 04:28:25PM -0500, Peter Bergner wrote:
> The following patch fixes a performance issue when loading/storing/moving
> TImode values when using -mvsx-timode -mcpu=power7 with LRA. The problem is
> that the vsx_le_permute_ and vsx_le_perm_{load,store}_ patterns
> do no support
The following patch fixes a performance issue when loading/storing/moving
TImode values when using -mvsx-timode -mcpu=power7 with LRA. The problem is
that the vsx_le_permute_ and vsx_le_perm_{load,store}_ patterns
do no support TImode values in GPRs, and LRA is using these patterns to
fixup constr
