On Sat, Nov 16, 2013 at 10:32 PM, Bill Schmidt
wrote:
> Hi,
>
> For VSX in little endian we currently split vector register stores into
> a permute/store pair. For prolog stores, this results in a
> REG_FRAME_RELATED_EXPR note that doesn't have a simple register for its
> RHS, which it needs to h
Hi,
For VSX in little endian we currently split vector register stores into
a permute/store pair. For prolog stores, this results in a
REG_FRAME_RELATED_EXPR note that doesn't have a simple register for its
RHS, which it needs to have. This patch detects that situation and
ensures we produce the
