On Wed, Jan 23, 2019 at 12:27 PM Uros Bizjak wrote:
>
> On Wed, Jan 23, 2019 at 8:52 PM H.J. Lu wrote:
> >
> > On Wed, Jan 23, 2019 at 11:22 AM Uros Bizjak wrote:
> > >
> > > Attached patch adds SSE alternatives to sse2_cvtpi2pd, sse2_cvtpd2pi
> > > and sse2_cvttpd2pi to avoid MMX registers when
On Wed, Jan 23, 2019 at 8:52 PM H.J. Lu wrote:
>
> On Wed, Jan 23, 2019 at 11:22 AM Uros Bizjak wrote:
> >
> > Attached patch adds SSE alternatives to sse2_cvtpi2pd, sse2_cvtpd2pi
> > and sse2_cvttpd2pi to avoid MMX registers when e.g. _mm_cvtepi32_pd
> > intrinsics is used. Without the patch, th
On Wed, Jan 23, 2019 at 11:22 AM Uros Bizjak wrote:
>
> Attached patch adds SSE alternatives to sse2_cvtpi2pd, sse2_cvtpd2pi
> and sse2_cvttpd2pi to avoid MMX registers when e.g. _mm_cvtepi32_pd
> intrinsics is used. Without the patch, the testcase compiles to (-O2
> -mavx):
>
> _Z7prepareii:
>
Attached patch adds SSE alternatives to sse2_cvtpi2pd, sse2_cvtpd2pi
and sse2_cvttpd2pi to avoid MMX registers when e.g. _mm_cvtepi32_pd
intrinsics is used. Without the patch, the testcase compiles to (-O2
-mavx):
_Z7prepareii:
vmovd %edi, %xmm1
vpinsrd $1, %esi, %xmm1, %xmm0