On Wed, Apr 27, 2016 at 8:05 PM, Uros Bizjak wrote:
> Hello!
>
> Based on recent discussion, the attached patch fixes ix86_spill_class
> condition. The spills to SSE registers are now enabled for real on
> SSE2 target, where inter-unit moves to/from vector registers are
> enabled.
>
> Since this i
Hello!
Based on recent discussion, the attached patch fixes ix86_spill_class
condition. The spills to SSE registers are now enabled for real on
SSE2 target, where inter-unit moves to/from vector registers are
enabled.
Since this is new functionality, the patch can cause some minor
runtime regress
