On 15/06/17 09:18, Thomas Preudhomme wrote:
>
>
> On 14/06/17 18:03, Richard Earnshaw (lists) wrote:
>> On 14/06/17 17:49, Thomas Preudhomme wrote:
>>> Hi,
>>>
>>> Testcase gcc.target/arm/its.c was added as part of a patch [1] to limit
>>> IT blocks to 2 instructions maximum. However, the patch w
On 14/06/17 18:03, Richard Earnshaw (lists) wrote:
On 14/06/17 17:49, Thomas Preudhomme wrote:
Hi,
Testcase gcc.target/arm/its.c was added as part of a patch [1] to limit
IT blocks to 2 instructions maximum. However, the patch was only tested
indirectly by *aiming* to check that the assembly
On 14/06/17 17:49, Thomas Preudhomme wrote:
> Hi,
>
> Testcase gcc.target/arm/its.c was added as part of a patch [1] to limit
> IT blocks to 2 instructions maximum. However, the patch was only tested
> indirectly by *aiming* to check that the assembly output does not
> contain a single IT block wi
Hi,
Testcase gcc.target/arm/its.c was added as part of a patch [1] to limit
IT blocks to 2 instructions maximum. However, the patch was only tested
indirectly by *aiming* to check that the assembly output does not
contain a single IT block with all conditional code in it. This was
actually implem
