Hi,
Please find updated patch to fix PR85434: spilling of stack protector
guard's address on ARM. Quite a few changes have been made to the ARM
part since last round of review so I think it makes more sense to
review it anew. Ran bootstrap + regression testsuite + glibc build +
glibc regression te
Good thing I did, found a missing earlyclobber in the process.
Rerunning all tests again.
Best regards,
Thomas
On Wed, 24 Oct 2018 at 10:13, Thomas Preudhomme
wrote:
>
> Please hold on for the reviews, found a small improvement that could
> be done. Am testing it right now, should have something
Please hold on for the reviews, found a small improvement that could
be done. Am testing it right now, should have something by tonight or
tomorrow.
Best regards,
Thomas
On Tue, 23 Oct 2018 at 13:35, Thomas Preudhomme
wrote:
>
> [Removing Jeff Law since middle end code hasn't changed]
>
> Hi,
>
[Removing Jeff Law since middle end code hasn't changed]
Hi,
Given how memory operand are reloaded even with an X constraint, I've
reworked the patch for the combined set and combined test instruction
ot keep the mem out of the match_operand and used an expander to
generate the right instruction
Hi Thomas,
On 29/08/18 10:51, Thomas Preudhomme wrote:
Resend hopefully without HTML this time.
On Wed, 29 Aug 2018 at 10:49, Thomas Preudhomme
wrote:
Hi,
I've reworked the patch fixing PR85434 (spilling of stack protector guard's
address on ARM) to address the testsuite regression on power
On 8/29/18 3:51 AM, Thomas Preudhomme wrote:
> Resend hopefully without HTML this time.
>
> On Wed, 29 Aug 2018 at 10:49, Thomas Preudhomme
> wrote:
>> Hi,
>>
>> I've reworked the patch fixing PR85434 (spilling of stack protector guard's
>> address on ARM) to address the testsuite regression on
Hi all,
Ping? This new version changes both the middle-end and back-end part
so will need a review for both of those.
Best regards,
Thomas
On Wed, 29 Aug 2018 at 11:07, Thomas Preudhomme
wrote:
>
> Forgot another important change in ARM backend:
>
> The expander were causing one too many indire
Forgot another important change in ARM backend:
The expander were causing one too many indirection which was what
caused the test failure in glibc. The new expanders code skip the
creation of a move from the memory reference of the guard's address to
a register since this is done in the insn thems
Resend hopefully without HTML this time.
On Wed, 29 Aug 2018 at 10:49, Thomas Preudhomme
wrote:
>
> Hi,
>
> I've reworked the patch fixing PR85434 (spilling of stack protector guard's
> address on ARM) to address the testsuite regression on powerpc and x86 as
> well as glibc testsuite regressio
On Tue, Jul 31, 2018 at 6:36 AM, Kyrill Tkachov
wrote:
> Hi Thomas,
>
>
> On 25/07/18 14:28, Thomas Preudhomme wrote:
>>
>> Hi Kyrill,
>>
>> Using memory_operand worked, the issues I encountered when using it in
>> earlier versions of the patch must have been due to the missing test
>> on address
Hi Thomas,
On 25/07/18 14:28, Thomas Preudhomme wrote:
Hi Kyrill,
Using memory_operand worked, the issues I encountered when using it in
earlier versions of the patch must have been due to the missing test
on address_operand in the preparation statements which I added later.
Please find an upda
Hi Kyrill,
Using memory_operand worked, the issues I encountered when using it in
earlier versions of the patch must have been due to the missing test
on address_operand in the preparation statements which I added later.
Please find an updated patch in attachment. ChangeLog entry is as
follows:
*
[Dropping Jeff Law from the list since he already commented on the
middle end parts]
Hi Kyrill,
On Thu, 19 Jul 2018 at 12:02, Kyrill Tkachov
wrote:
>
> Hi Thomas,
>
> On 17/07/18 12:02, Thomas Preudhomme wrote:
> > Fixed in attached patch. ChangeLog entries are unchanged:
> >
> > *** gcc/ChangeL
Hi Thomas,
On 17/07/18 12:02, Thomas Preudhomme wrote:
Fixed in attached patch. ChangeLog entries are unchanged:
*** gcc/ChangeLog ***
2018-07-05 Thomas Preud'homme
PR target/85434
* target-insns.def (stack_protect_combined_set): Define new standard
pattern name.
(stack_prot
Fixed in attached patch. ChangeLog entries are unchanged:
*** gcc/ChangeLog ***
2018-07-05 Thomas Preud'homme
PR target/85434
* target-insns.def (stack_protect_combined_set): Define new standard
pattern name.
(stack_protect_combined_test): Likewise.
* cfgexpand.c (stack_pr
On 07/05/2018 08:48 AM, Thomas Preudhomme wrote:
> In case of high register pressure in PIC mode, address of the stack
> protector's guard can be spilled on ARM targets as shown in PR85434,
> thus allowing an attacker to control what the canary would be compared
> against. ARM does lack stack_prote
Adding Jeff and Eric since the patch adds an RTL target hook.
Best regards,
Thomas
On Thu, 5 Jul 2018 at 15:48, Thomas Preudhomme
wrote:
>
> In case of high register pressure in PIC mode, address of the stack
> protector's guard can be spilled on ARM targets as shown in PR85434,
> thus allowing
In case of high register pressure in PIC mode, address of the stack
protector's guard can be spilled on ARM targets as shown in PR85434,
thus allowing an attacker to control what the canary would be compared
against. ARM does lack stack_protect_set and stack_protect_test insn
patterns, defining the
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