>
> Ping? Note that the patch has been on GCC 6 for more than 3 months now without
> any issue reported against it.
OK.
Ramana
>
> Best regards,
>
> Thomas
On Thursday 03 March 2016 18:10:38 Thomas Preudhomme wrote:
> On Thursday 03 March 2016 15:32:27 Thomas Preudhomme wrote:
> > On Thursday 03 March 2016 09:44:31 Ramana Radhakrishnan wrote:
> > > On Thu, Mar 3, 2016 at 9:40 AM, Thomas Preudhomme
> > >
> > > wrote:
> > > > On Friday 15 January 2016
On Thursday 03 March 2016 15:32:27 Thomas Preudhomme wrote:
> On Thursday 03 March 2016 09:44:31 Ramana Radhakrishnan wrote:
> > On Thu, Mar 3, 2016 at 9:40 AM, Thomas Preudhomme
> >
> > wrote:
> > > On Friday 15 January 2016 12:45:04 Ramana Radhakrishnan wrote:
> > >> On Wed, Dec 16, 2015 at 9:1
On Thursday 03 March 2016 09:44:31 Ramana Radhakrishnan wrote:
> On Thu, Mar 3, 2016 at 9:40 AM, Thomas Preudhomme
>
> wrote:
> > On Friday 15 January 2016 12:45:04 Ramana Radhakrishnan wrote:
> >> On Wed, Dec 16, 2015 at 9:11 AM, Thomas Preud'homme
> >>
> >> wrote:
> >> > During reorg pass, th
On Thu, Mar 3, 2016 at 9:40 AM, Thomas Preudhomme
wrote:
> On Friday 15 January 2016 12:45:04 Ramana Radhakrishnan wrote:
>> On Wed, Dec 16, 2015 at 9:11 AM, Thomas Preud'homme
>>
>> wrote:
>> > During reorg pass, thumb1_reorg () is tasked with rewriting mov rd, rn to
>> > subs rd, rn, 0 to avoid
On Friday 15 January 2016 12:45:04 Ramana Radhakrishnan wrote:
> On Wed, Dec 16, 2015 at 9:11 AM, Thomas Preud'homme
>
> wrote:
> > During reorg pass, thumb1_reorg () is tasked with rewriting mov rd, rn to
> > subs rd, rn, 0 to avoid a comparison against 0 instruction before doing a
> > condition
On Wed, Dec 16, 2015 at 9:11 AM, Thomas Preud'homme
wrote:
> During reorg pass, thumb1_reorg () is tasked with rewriting mov rd, rn to
> subs rd, rn, 0 to avoid a comparison against 0 instruction before doing a
> conditional branch based on it. The actual avoiding of cmp is done in
> cbranchsi4
During reorg pass, thumb1_reorg () is tasked with rewriting mov rd, rn to subs
rd, rn, 0 to avoid a comparison against 0 instruction before doing a
conditional branch based on it. The actual avoiding of cmp is done in
cbranchsi4_insn instruction C output template. When the condition is met, the