Hi Richard,
On 26/09/18 06:03, rth7...@gmail.com wrote:
From: Richard Henderson
This pattern will only be used with the __sync functions, because
we do not yet have a bare TImode atomic load.
Does this mean that the libatomic `defined(atomic_compare_exchange_n)`
checks would return false fo
On 27/09/18 17:32, Richard Henderson wrote:
On 9/27/18 6:04 AM, Matthew Malcomson wrote:
Hi Richard,
On 26/09/18 06:03, rth7...@gmail.com wrote:
From: Richard Henderson
This pattern will only be used with the __sync functions, because
we do not yet have a bare TImode atomic load.
I don't
On 9/27/18 6:04 AM, Matthew Malcomson wrote:
> Hi Richard,
>
>
> On 26/09/18 06:03, rth7...@gmail.com wrote:
>> From: Richard Henderson
>>
>> This pattern will only be used with the __sync functions, because
>> we do not yet have a bare TImode atomic load.
>>
>>
> I don't have any comment on the
Hi Richard,
I don't have any comment on the overall aim of the patch series, but in
this particular
patch implementing casp it looks like you doesn't ensure the register
pairs for casp are
even-odd.
This is the restriction in the Arm Arm decode for casp variants as
if Rs<0> == '1' then Unall
From: Richard Henderson
This pattern will only be used with the __sync functions, because
we do not yet have a bare TImode atomic load.
* config/aarch64/aarch64.c (aarch64_gen_compare_reg): Add support
for NE comparison of TImode values.
(aarch64_print_operand): Ex
