在 2023/4/4 下午4:40, Xi Ruoyao 写道:
On Tue, 2023-04-04 at 16:00 +0800, Xi Ruoyao via Gcc-patches wrote:
On Tue, 2023-04-04 at 11:01 +0800, Lulu Cheng wrote:
/* snip */
+unsigned long f10 (unsigned long x) { return x - 0x8000l * 2; }
+unsigned long f11 (unsigned long x) { return x - 0x8
On Tue, 2023-04-04 at 16:00 +0800, Xi Ruoyao via Gcc-patches wrote:
> On Tue, 2023-04-04 at 11:01 +0800, Lulu Cheng wrote:
>
> /* snip */
>
> > > +unsigned long f10 (unsigned long x) { return x - 0x8000l * 2; }
> > > +unsigned long f11 (unsigned long x) { return x - 0x8000l * 2; }
> > Th
On Tue, 2023-04-04 at 11:01 +0800, Lulu Cheng wrote:
/* snip */
> > +unsigned long f10 (unsigned long x) { return x - 0x8000l * 2; }
> > +unsigned long f11 (unsigned long x) { return x - 0x8000l * 2; }
> These two test cases are duplicates.
/* snip */
>
> > +unsigned int g10 (unsigned
/* snip */
diff --git a/gcc/testsuite/gcc.target/loongarch/add-const.c
b/gcc/testsuite/gcc.target/loongarch/add-const.c
new file mode 100644
index 000..3a9f72fe83d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/add-const.c
@@ -0,0 +1,47 @@
+/* { dg-do compile } */
+/* { dg-opt
1. Use addu16i.d for TARGET_64BIT and suitable immediates.
2. Split one addition with immediate into two addu16i.d or addi.{d/w}
instructions if possible. This can avoid using a temp register w/o
increase the count of instructions.
Inspired by https://reviews.llvm.org/D143710 and
https://re
