Hi all,
On 09/01/19 12:26, Richard Sandiford wrote:
Alejandro Martinez Vicente writes:
> Hi,
>
> I updated the patch to address Wilco's comment and style issues.
OK, thanks.
I've committed this on Alejandro's behalf with r267764.
As discussed internally, I think for GCC 10 we should inste
Alejandro Martinez Vicente writes:
> Hi,
>
> I updated the patch to address Wilco's comment and style issues.
OK, thanks.
As discussed internally, I think for GCC 10 we should instead make
the vectoriser replace copysign with logic ops if the target has
no better implementation. This would be s
Hi,
I updated the patch to address Wilco's comment and style issues.
Alejandro
> -Original Message-
> From: Wilco Dijkstra
> Sent: 08 January 2019 16:58
> To: GCC Patches ; Alejandro Martinez Vicente
>
> Cc: nd ; Richard Sandiford
> Subject: Re: [Aarc
Hi Alejandro,
+emit_move_insn (mask,
+ aarch64_simd_gen_const_vector_dup (mode,
+ HOST_WIDE_INT_M1U
+ << bits));
+
+emit_insn (gen_and3 (sign, arg2, mask));
Is there
Hi,
This patch adds support for copysign and xorsign builtins to SVE. With the new
expands, they can be vectorized using bitwise logical operations.
I tested this patch in an aarch64 machine bootstrapping the compiler and
running the checks.
Alejandro
gcc/Changelog:
2019-01-08 Alejandro Marti