Re: [AArch64] Use all SVE LD1RQ variants

2018-01-29 Thread James Greenhalgh
On Fri, Jan 26, 2018 at 01:50:40PM +, Richard Sandiford wrote: > The fallback way of handling a repeated 128-bit constant vector for SVE > is to force the 128 bits to the constant pool and use LD1RQ to load it. > Previously the code always used the byte variant of LD1RQ (LD1RQB), > with a prece

[AArch64] Use all SVE LD1RQ variants

2018-01-26 Thread Richard Sandiford
The fallback way of handling a repeated 128-bit constant vector for SVE is to force the 128 bits to the constant pool and use LD1RQ to load it. Previously the code always used the byte variant of LD1RQ (LD1RQB), with a preceding BSWAP for big-endian targets. However, that BSWAP doesn't handle all