Christophe Lyon writes:
> On Mon, 30 Sep 2019 at 17:24, Richard Sandiford
> wrote:
>
> Richard Sandiford writes:
> > The aarch64_vector_pcs handling in
> aarch64_hard_regno_call_part_clobbered
> > checks whether the mode might be bigger than 16 bytes, since on SVE
> > targets th
On Mon, 30 Sep 2019 at 17:24, Richard Sandiford
wrote:
> Richard Sandiford writes:
> > The aarch64_vector_pcs handling in aarch64_hard_regno_call_part_clobbered
> > checks whether the mode might be bigger than 16 bytes, since on SVE
> > targets the (non-SVE) vector PCS only guarantees that the l
Richard Sandiford writes:
> The aarch64_vector_pcs handling in aarch64_hard_regno_call_part_clobbered
> checks whether the mode might be bigger than 16 bytes, since on SVE
> targets the (non-SVE) vector PCS only guarantees that the low 16 bytes
> are preserved. But for multi-register modes, we sh
The aarch64_vector_pcs handling in aarch64_hard_regno_call_part_clobbered
checks whether the mode might be bigger than 16 bytes, since on SVE
targets the (non-SVE) vector PCS only guarantees that the low 16 bytes
are preserved. But for multi-register modes, we should instead test
whether each sing
