Re: [AArch64] Add a "y" constraint for V0-V7

2019-08-13 Thread Richard Sandiford
James Greenhalgh writes: > On Wed, Aug 07, 2019 at 07:19:12PM +0100, Richard Sandiford wrote: >> Some indexed SVE FCMLA operations have a 3-bit register field that >> requires one of Z0-Z7. This patch adds a public "y" constraint for that. >> >> The patch also documents "x", which is again inten

Re: [AArch64] Add a "y" constraint for V0-V7

2019-08-12 Thread James Greenhalgh
On Wed, Aug 07, 2019 at 07:19:12PM +0100, Richard Sandiford wrote: > Some indexed SVE FCMLA operations have a 3-bit register field that > requires one of Z0-Z7. This patch adds a public "y" constraint for that. > > The patch also documents "x", which is again intended to be a public > constraint.

[AArch64] Add a "y" constraint for V0-V7

2019-08-07 Thread Richard Sandiford
Some indexed SVE FCMLA operations have a 3-bit register field that requires one of Z0-Z7. This patch adds a public "y" constraint for that. The patch also documents "x", which is again intended to be a public constraint. Tested on aarch64-linux-gnu (with and without SVE) and aarch64_be-elf. OK t