On 05/14/14 14:34, Alan Lawrence wrote:
In final testing I noticed that vtrnf32_1.c, vtrns32_1.c and vtrnu32_1.c were
failing the scan-assembler-times test: in such two-element cases, TRN, UZP and
ZIP are all equivalent and equally valid, and the ARM backend
(arm_expand_vec_perm_const_1) outputs
In final testing I noticed that vtrnf32_1.c, vtrns32_1.c and vtrnu32_1.c were
failing the scan-assembler-times test: in such two-element cases, TRN, UZP and
ZIP are all equivalent and equally valid, and the ARM backend
(arm_expand_vec_perm_const_1) outputs UZP. Hence, I've pushed the attached
p
On Fri, Mar 28, 2014 at 3:50 PM, Alan Lawrence wrote:
> Final patch in series, adds new tests of the ARM TRN Intrinsics, that also
> check
> the execution results, reusing the test bodies introduced into AArch64 in
> the
> first patch. (These tests subsume the autogenerated ones in
> testsuite/gcc
Final patch in series, adds new tests of the ARM TRN Intrinsics, that also check
the execution results, reusing the test bodies introduced into AArch64 in the
first patch. (These tests subsume the autogenerated ones in
testsuite/gcc.target/arm/neon/ that only check assembler output.)
Tests use gc
