Re: [AARCH64][Insn classification unification 3/N] ALU/shift types

2013-09-05 Thread Richard Earnshaw
On 05/09/13 10:06, James Greenhalgh wrote: > > *PING* > > I've rebased this patch on to current trunk, the changes between this and > the previous version are below: > >> @@ -3203,7 +3203,7 @@ (define_insn "*aarch64_ashl_sisd_or_int_ >> (set_attr "simd_type" "simd_shift_imm,simd_shift,*") >>

Re: [AARCH64][Insn classification unification 3/N] ALU/shift types

2013-08-06 Thread Richard Earnshaw
On 06/08/13 10:04, Richard Earnshaw wrote: > On 06/08/13 09:48, James Greenhalgh wrote: >> *Ping* >> >> James >> >> On Thu, Aug 01, 2013 at 02:50:07PM +0100, Sofiane Naci wrote: >>> Hi, >>> >>> This patch is part of the ongoing work to unify instruction classification >>> between the ARM and AARCH6

Re: [AARCH64][Insn classification unification 3/N] ALU/shift types

2013-08-06 Thread Richard Earnshaw
On 06/08/13 09:48, James Greenhalgh wrote: > *Ping* > > James > > On Thu, Aug 01, 2013 at 02:50:07PM +0100, Sofiane Naci wrote: >> Hi, >> >> This patch is part of the ongoing work to unify instruction classification >> between the ARM and AARCH64 backends. >> >> This patch fine tunes the ALU/shif

Re: [AARCH64][Insn classification unification 3/N] ALU/shift types

2013-08-06 Thread James Greenhalgh
*Ping* James On Thu, Aug 01, 2013 at 02:50:07PM +0100, Sofiane Naci wrote: > Hi, > > This patch is part of the ongoing work to unify instruction classification > between the ARM and AARCH64 backends. > > This patch fine tunes the ALU/shift type attribute values in the ARM backend > as detailed