[PATCH] RISC-V: Bugfix for rvv bool mode precision adjustment

2023-02-16 Thread incarnation.p.lee--- via Gcc-patches
From: Pan Li Fix the bug of the rvv bool mode precision with the adjustment. The bits size of vbool*_t will be adjusted to [1, 2, 4, 8, 16, 32, 64] according to the rvv spec 1.0 isa. The adjusted mode precison of vbool*_t will help underlying pass to make t

[PATCH] RISC-V: Bugfix for mode tieable of the rvv bool types

2023-02-11 Thread incarnation.p.lee--- via Gcc-patches
From: Pan Li Fix the bug for mode tieable of the rvv bool types. The vbool*_t cannot be tied as the actually load/store size is determinated by the vl. The mode size of rvv bool types are also adjusted for the underlying optimization pass. The rvv bool type is vboo

[PATCH] RISC-V: Optimize the code gen of VLM/VSM.

2023-02-10 Thread incarnation.p.lee--- via Gcc-patches
From: Pan Li PR 108185 PR 108654 The bytesize of the vbool*_t isn't well defined. This patch adjust the rvv bool modes with actually mode size in bytes. However, only allow mode tieable when exactly equal for the rvv bool types, aka vbool1_t, vbool