Another way (not saying this is better, just throwing out ideas) is to
break AVX10.1 into all the AVX-512 subsets.
So you'd have something like -mavx10.1-256-vl, -mavx10.1-512-vbmi etc.
* -mavx10.1-256 would effectively be an alias for all the 128+256-bit
subsets, and set the __AVX10_1__ defin
Thanks for the responses!
It'd be unfortunate if AVX10 adoption is desired, yet there's no way to
compile existing 256-bit code to be compatible with it.
Relying on SDE to check the output isn't a particularly viable solution.
It looks like `-mavx512vl -mprefer-vector-width=256` is my best bet
Hi,
With the proposed design of these switches, how would I restrict AVX10.1
to particular AVX-512 subsets?
For example, usage of the |_mm256_rol_epi32| intrinsic should be
compatible on any AVX10/256 implementation, /as well as /any AVX-512VL
without AVX10 implementation (e.g. Skylake-X).
