Ping!
Rgds,
Yvan
From: Torbjorn SVENSSON - foss
Sent: Friday, March 15, 2024 11:32 AM
To: David Malcolm; Alexandre Oliva
Cc: gcc-patches@gcc.gnu.org; Yvan ROUX - foss
Subject: [PING^3] Re: [PATCH] analyzer: deal with -fshort-enums
Ping!
Kind regards
On Mon, Sep 12, 2022 at 05:09:57PM +0100, Richard Sandiford wrote:
> Yvan Roux writes:
> > Hi Richard,
> > On Mon, Sep 12, 2022 at 12:56:52PM +0100, Richard Sandiford via Gcc-patches
> > wrote:
> >> Torbjörn SVENSSON via Gcc-patches writes:
> >> > PR/95
this patch, it is not
handled by like "-Xlinker" thus a "-Wl,"
prefix is placed between -T and the linker file, we'll send another
patch to fix that issue.
Thanks,
Yvan
> Thanks,
> Richard
>
> > Co-Authored-By: Yvan ROUX
> > Signed-off-by: Tor
On Fri, 10 Aug 2018 at 17:01, Ramana Radhakrishnan
wrote:
>
> On Fri, Aug 10, 2018 at 3:35 PM, Yvan Roux wrote:
> > On Fri, 10 Aug 2018 at 14:31, Yvan Roux wrote:
> >>
> >> On Fri, 10 Aug 2018 at 13:45, Ramana Radhakrishnan
> >> wrote:
> >> >
On Fri, 10 Aug 2018 at 14:31, Yvan Roux wrote:
>
> On Fri, 10 Aug 2018 at 13:45, Ramana Radhakrishnan
> wrote:
> >
> > On Fri, Aug 10, 2018 at 11:09 AM, Yvan Roux wrote:
> > > Hi,
> > >
> > > This patch adds Linaro version string and
On Fri, 10 Aug 2018 at 13:45, Ramana Radhakrishnan
wrote:
>
> On Fri, Aug 10, 2018 at 11:09 AM, Yvan Roux wrote:
> > Hi,
> >
> > This patch adds Linaro version string and release macros to ARM GCC 8
> > vendor branch.
> >
> > Ok to commit?
> >
Hi,
This patch adds Linaro version string and release macros to ARM GCC 8
vendor branch.
Ok to commit?
Thanks
Yvan
gcc/ChangeLog
2018-08-10 Yvan Roux
* LINARO-VERSION: New file.
* configure.ac: Add Linaro version string.
* configure: Regenerate.
* Makefile.in (LINAROVER
On 5 October 2017 at 13:38, Petr Ovtchenkov wrote:
> On Thu, 5 Oct 2017 12:56:36 +0200
> Yvan Roux wrote:
>
>> On 5 September 2017 at 12:04, Jakub Jelinek wrote:
>> > On Tue, Sep 05, 2017 at 10:58:22AM +0200, Yvan Roux wrote:
>> >> ping
>> >>
On 5 September 2017 at 12:04, Jakub Jelinek wrote:
> On Tue, Sep 05, 2017 at 10:58:22AM +0200, Yvan Roux wrote:
>> ping
>>
>> https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01784.html
>
> This really needs to be reviewed by a build machinery maintainer.
Thanks for the
On 18 August 2017 at 10:27, Yvan Roux wrote:
> On 4 August 2017 at 15:52, Yvan Roux wrote:
>> On 11 July 2017 at 12:25, Yvan Roux wrote:
>>> On 3 July 2017 at 11:21, Yvan Roux wrote:
>>>> On 23 June 2017 at 15:44, Yvan Roux wrote:
>>>>> Hello,
>
.html
Bootstrapped and regression tested on x86, ARM and AArch64 targets.
Ok for gcc-6-branch ?
Thanks,
Yvan
2017-08-24 Yvan Roux
PR c++/80287 C++ crash with __attribute((may_alias))
Backport from mainline
2017-04-17 Bernd Edlinger
PR c++/80287
* class.c
On 4 August 2017 at 15:52, Yvan Roux wrote:
> On 13 July 2017 at 14:02, Yvan Roux wrote:
>> Hi,
>>
>> as discussed in the PR, this patch adds a new reduced testcase which
>> doesn't rely on c++17 features, this is a prereq to the backport of
>> the fix into
On 4 August 2017 at 15:52, Yvan Roux wrote:
> On 11 July 2017 at 12:25, Yvan Roux wrote:
>> On 3 July 2017 at 11:21, Yvan Roux wrote:
>>> On 23 June 2017 at 15:44, Yvan Roux wrote:
>>>> Hello,
>>>>
>>>> Fortran parts of libgomp (omp_lib.mo
On 11 August 2017 at 13:50, Wilco Dijkstra wrote:
> Kugan wrote:
>> Ping^2?
>
> Could you make sure to either include the patch or provide a link to it?
> (https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01967.html)
>
> I think the patch is fine since avoiding adrp/ldr on literals doesn't really
> h
On 13 July 2017 at 14:02, Yvan Roux wrote:
> Hi,
>
> as discussed in the PR, this patch adds a new reduced testcase which
> doesn't rely on c++17 features, this is a prereq to the backport of
> the fix into GCC 6 branch which is impacted by this issue.
>
> Validat
On 11 July 2017 at 12:25, Yvan Roux wrote:
> On 3 July 2017 at 11:21, Yvan Roux wrote:
>> On 23 June 2017 at 15:44, Yvan Roux wrote:
>>> Hello,
>>>
>>> Fortran parts of libgomp (omp_lib.mod, openacc.mod, etc...) are
>>> missing in a canadi
On 11 July 2017 at 12:26, Yvan Roux wrote:
> On 3 July 2017 at 12:48, Yvan Roux wrote:
>> On 27 June 2017 at 13:14, Yvan Roux wrote:
>>> Hi Wilco
>>>
>>> On 27 June 2017 at 12:53, Wilco Dijkstra wrote:
>>>> Hi Yvan,
>>>>
>>>&
hanks,
Yvan
gcc/testsuite
2017-07-13 Yvan Roux
PR c++/80287
* g++.dg/pr80287.C: New test.
diff --git a/gcc/testsuite/g++.dg/pr80287.C b/gcc/testsuite/g++.dg/pr80287.C
new file mode 100644
index 000..da8d3fab150
--- /dev/null
+++ b/gcc/testsuite/g++.dg/pr80287.C
@@ -0,0
On 3 July 2017 at 12:48, Yvan Roux wrote:
> On 27 June 2017 at 13:14, Yvan Roux wrote:
>> Hi Wilco
>>
>> On 27 June 2017 at 12:53, Wilco Dijkstra wrote:
>>> Hi Yvan,
>>>
>>>> Here is the backport of Wilco's patch (r237607) along with
On 3 July 2017 at 11:21, Yvan Roux wrote:
> On 23 June 2017 at 15:44, Yvan Roux wrote:
>> Hello,
>>
>> Fortran parts of libgomp (omp_lib.mod, openacc.mod, etc...) are
>> missing in a canadian cross build, at least when target gfortran
>> compiler comes from PATH
On 27 June 2017 at 13:14, Yvan Roux wrote:
> Hi Wilco
>
> On 27 June 2017 at 12:53, Wilco Dijkstra wrote:
>> Hi Yvan,
>>
>>> Here is the backport of Wilco's patch (r237607) along with Kyrill's
>>> one (r244643, which removed the remaining occ
On 23 June 2017 at 15:44, Yvan Roux wrote:
> Hello,
>
> Fortran parts of libgomp (omp_lib.mod, openacc.mod, etc...) are
> missing in a canadian cross build, at least when target gfortran
> compiler comes from PATH and not from GFORTRAN_FOR_TARGET.
>
> Back in 2010, executabi
Hi Sandra,
On 27 June 2017 at 18:05, Sandra Loosemore wrote:
> On 06/27/2017 06:19 AM, Yvan Roux wrote:
>
>> diff --git a/gcc/config/aarch64/aarch64.opt
>> b/gcc/config/aarch64/aarch64.opt
>> index 942a7d5..0fd1bfa 100644
>> --- a/gcc/config/aarch64/aarch64.o
On 27 June 2017 at 16:55, Yvan Roux wrote:
> Hi
>
> On 27 June 2017 at 16:49, Wilco Dijkstra wrote:
>> As described in PR79041, -mcmodel=large -mpc-relative-literal-loads
>> may be used to avoid generating ADRP/ADD or ADRP/LDR. However both
>> trunk and GCC7 m
Hi
On 27 June 2017 at 16:49, Wilco Dijkstra wrote:
> As described in PR79041, -mcmodel=large -mpc-relative-literal-loads
> may be used to avoid generating ADRP/ADD or ADRP/LDR. However both
> trunk and GCC7 may still emit ADRP for some constant pool literals.
> Fix this by adding a aarch64_pcrel
trunk ?
Thanks
Yvan
gcc/ChangeLog
2017-06-27 Yvan Roux
* config/aarch64/aarch64.opt
(mpc-relative-literal-loads): Remove redundant property.
* doc/invoke.texi (AArch64): Add missing options.
diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt
in
Hi Wilco
On 27 June 2017 at 12:53, Wilco Dijkstra wrote:
> Hi Yvan,
>
>> Here is the backport of Wilco's patch (r237607) along with Kyrill's
>> one (r244643, which removed the remaining occurences of
>> aarch64_nopcrelative_literal_loads). To fix the issue the original
>> patch has to be modifie
Hi,
On 22 June 2017 at 20:42, Yvan Roux wrote:
> Hi all,
>
> On 16 January 2017 at 16:34, Kyrill Tkachov
> wrote:
>>
>> On 13/01/17 16:35, James Greenhalgh wrote:
>>>
>>> On Wed, Jan 11, 2017 at 04:32:45PM +, Kyrill Tkachov wrote:
>>>&g
e bug is still present since compiling
gcc.target/aarch64/pr78733.c with -mcmodel=large brings back the
:lo12: relocations (I'll submit a patch to add the test back if my
understanding is correct).
Cross built and regtested without issue for aarch64-linux-gnu,
aarch64-none-elf and aarch64_be-no
Hi Bernd,
On 20 April 2017 at 21:11, Bernd Edlinger wrote:
> Hi!
>
> This is my new attempt to clean up the different cross compiler
> configurations. It turned out to be a very complicated matter,
> so I thought it would be better to postpone it to the stage1.
>
> In a canadian cross compiler s
On 18 April 2017 at 20:17, Bernd Edlinger wrote:
> On 04/14/17 12:29, Bernd Edlinger wrote:
>> Hi RMs:
>>
>> I am sorry that this happened so close to the imminent gcc-7 release
>> date.
>>
>> To my best knowledge it would be fine to apply this update patch on the
>> trunk: https://gcc.gnu.org/ml/
On 14 April 2017 at 12:29, Bernd Edlinger wrote:
> Hi Yvan,
>
> On 04/14/17 10:24, Yvan Roux wrote:
>> Hi Bernd,
>>
>> On 14 April 2017 at 06:18, Bernd Edlinger wrote:
>>> On 04/12/17 17:58, Yvan Roux wrote:
>>>> Hi,
>>>>
>>>&g
Hi Bernd,
On 14 April 2017 at 06:18, Bernd Edlinger wrote:
> On 04/12/17 17:58, Yvan Roux wrote:
>> Hi,
>>
>> On 20 February 2017 at 18:53, Bruce Korb wrote:
>>> On 02/18/17 01:01, Bernd Edlinger wrote:
>>>> On 02/18/17 00:37, Bruce Korb wrote:
>
ry.
> So it looks good to me.
We just noticed that this patch brakes canadian cross builds when
configured with --with-build-sysroot, since headers are searched into
the target sysroot instead of the one specified for builds.
Maybe there's a cleaner way to fix this and avoid the duplicati
Hi,
On 10 November 2016 at 18:00, Jakub Jelinek wrote:
> Hi!
>
> On arm/aarch64 we ICE because some decls that make it here has non-NULL
> DECL_SIZE, which is a VAR_DECL rather than CONST_INT (or DECL_SIZE that
> doesn't fit into shwi would ICE similarly). While it is arguably a FE bug
> that it
Hi Richard,
On 6 September 2016 at 14:41, Richard Biener wrote:
>
> The following fixes PR77450.
>
> Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.
>
> Richard.
>
> 2016-09-06 Richard Biener
>
> PR c/77450
> c-family/
> * c-common.c (c_common_mar
Hi Michael,
On 2 August 2016 at 11:25, Kyrill Tkachov wrote:
> Hi Michael,
>
>
> On 02/08/16 09:13, Michael Collison wrote:
>>
>> Hi,
>>
>> This patch improves code generations for builtin arithmetic overflow
>> operations for the arm backend. As an example for a simple test case such
>> as:
>>
>
Hi,
On 6 April 2016 at 17:29, Yvan Roux wrote:
> On 6 April 2016 at 17:24, Pedro Alves wrote:
>> On 04/06/2016 04:13 PM, Yvan Roux wrote:
>>> On 6 April 2016 at 17:09, Pedro Alves wrote:
>>>> On 04/06/2016 03:53 PM, Yvan Roux wrote:
>>>>> Dejagnu
On 6 April 2016 at 17:24, Pedro Alves wrote:
> On 04/06/2016 04:13 PM, Yvan Roux wrote:
>> On 6 April 2016 at 17:09, Pedro Alves wrote:
>>> On 04/06/2016 03:53 PM, Yvan Roux wrote:
>>>> Dejagnu cleanup mechanism needs to be enhanced, but I think that it
>>>
On 6 April 2016 at 17:09, Pedro Alves wrote:
> On 04/06/2016 03:53 PM, Yvan Roux wrote:
>> Dejagnu cleanup mechanism needs to be enhanced, but I think that it
>> would also be better if guality tests don't get stuck and/or can be
>> killed easily. This patch chang
ed without regression on native x86_64, i386, aarch64 targets and
unleash native armv8l one. Is it OK for trunk ? (I don't know the
rules for that kind of testsuite fix during stage 4).
Cheers,
Yvan
2016-04-06 Yvan Roux
Pedro Alves
* gcc.dg/guality/guality.h (main):
Hi,
On 26 January 2015 at 18:01, Matthew Wahab wrote:
> Hello,
>
> The LEGITIMIZE_RELOAD_ADDRESS macro is only needed for reload. Since the
> Aarch64 backend no longer supports reload, this macro is not needed and this
> patch removes it.
>
> Tested aarch64-none-linux-gnu with gcc-check. No new f
an armv8l-linux-gnueabihf compiler configured for armv8.1-a)
Thanks
Yvan
2016-01-13 Yvan Roux
* config/arm/arm-arches.def: Remove spurious whitespace in "armv8.1-a"
and "armv8.1-a+crc" entries.
diff --git a/gcc/config/arm/arm-arches.def b/gcc/config/ar
Hi,
On 25 November 2015 at 14:54, Bernd Schmidt wrote:
> On 11/25/2015 01:21 PM, Richard Sandiford wrote:
>>
>> - (plus:SI (match_operand:SI 0 "s_register_operand" "l, r")
>> - (match_operand:SI 1 "arm_add_operand""lPv,rIL"))
>> + (plus:SI (match_operand:SI 0
On 25 November 2015 at 11:36, Kyrill Tkachov wrote:
> Hi Yvan,
>
>
> On 24/11/15 15:05, Yvan Roux wrote:
>>
>> Hi Kyrill,
>>
>> On 24 November 2015 at 14:31, Kyrill Tkachov
>> wrote:
>>>
>>> Ping.
>>>
>>> Thanks,
>
Hi Wilco,
> Enable instruction fusion of AES instructions on ARM for Cortex-A53 and
> Cortex-A57.
I've a question regarding Cortex-A35, I don't see the same
documentation for it on ARM website as we have for the other cores
yet, but is AES fusion not beneficial for it or is it planned to do it
la
Hi Kyrill,
On 24 November 2015 at 14:31, Kyrill Tkachov wrote:
> Ping.
>
> Thanks,
> Kyrill
>
>
>
> On 13/11/15 11:50, Kyrill Tkachov wrote:
>>
>> Ping.
>> https://gcc.gnu.org/ml/gcc-patches/2015-11/msg00686.html
>>
>> Thanks,
>> Kyrill
>>
>> On 06/11/15 17:05, Kyrill Tkachov wrote:
>>>
>>> Hi al
On 2 November 2015 at 10:24, Ramana Radhakrishnan
wrote:
>
>
> On 02/11/15 09:01, Christophe Lyon wrote:
>> On 2 November 2015 at 09:51, Yvan Roux wrote:
>>> On 2 November 2015 at 09:38, Ramana Radhakrishnan
>>> wrote:
>>>>
>>>>>&g
On 2 November 2015 at 09:38, Ramana Radhakrishnan
wrote:
>
2015-10-12 Kyrylo Tkachov
PR target/67929
* gcc.target/arm/pr67929_1.c: New test.
>>
>> This test fails when tested on hard-float targets, adding the
>> following line to avoid testing it in such cases w
Hi Kyrill,
On 27 October 2015 at 13:08, Ramana Radhakrishnan
wrote:
> On Wed, Oct 14, 2015 at 1:23 PM, Kyrill Tkachov
> wrote:
>> Hi all,
>>
>> This patch fixes the referenced PR by rewriting the
>> vfp3_const_double_for_bits function in arm.c
>> The function is supposed to accept positive CONS
branch.
Ok great. Thanks for these backports Sebastian.
Cheers,
Yvan
> Thanks,
> Sebastian
>
> -Original Message-
> From: Yvan Roux [mailto:yvan.r...@linaro.org]
> Sent: Monday, August 31, 2015 10:43 AM
> To: Sebastian Pop
> Cc: gcc-patches@gcc.gnu.org; Sebastia
Hi Sebastian,
On 31 August 2015 at 17:33, Sebastian Pop wrote:
> Hi,
>
> As I was backporting the jump-thread patches to the AOSP gcc 4.9, I found that
> the linaro branch does not have the following three fixes. Ok to commit to
> the
> linaro/gcc-4_9-branch?
Our 4.9 branch is now in maintenan
On 11 August 2015 at 12:28, Ramana Radhakrishnan
wrote:
>>
>> Yes in big-endian DI mode value are stored into VFP registers, and
>> here register 16 is the first of them s0. Just in case you want to do
>> more test, the issue can be seen with a oneline testcase:
>>
>> __attribute__((__vector_size
Hi Alan,
On 10 August 2015 at 18:02, Alan Lawrence wrote:
> Yvan Roux wrote:
>>
>> Hi,
>>
>> this patch is a fix for pr27127. It avoids splitting the DI registers
>> into SI ones if it is not allowed, which breaks the introduced loop.
>> I haven&#
Hi,
this patch is a fix for pr27127. It avoids splitting the DI registers
into SI ones if it is not allowed, which breaks the introduced loop.
I haven't added a testcase as the bug is already exhibited by several
regressions (like g++.dg/ext/attribute-test-2.C or g++.dg/eh/simd-1.C)
but I can add
2012-02/msg00320.html
>
> Yes, that seems better.
I've rebased the patch on trunk, bootstrap is ok and when configuring
with options:
"--with-sysroot=/ --with-gxx-include-dir=/usr/include/c++/4.9.2"
gcc_gxx_include_dir keeps its leading slash.
Is it ok for trunk ?
Thanks,
Yvan
Hi,
On 8 May 2015 at 00:07, Joseph Myers wrote:
> On Mon, 20 Apr 2015, Pavel Kopyl wrote:
>
>> Hi all,
>>
>>
>> To build a GCC-4.9.2 ARM cross-compiler for my setting I need to configure it
>> with "--with-sysroot=/ --with-gxx-include-dir=/usr/include/c++/4.9.2".
>> But I found that gcc driver r
Hi,
On 5 May 2015 at 10:11, Marcus Shawcroft wrote:
> On 4 May 2015 at 09:58, Yvan Roux wrote:
>
>> Yes this is a better formulation.
>>
>>> +corresponding flag to the linker. It can be explicitly disabled
>>> during
>>> +compilation by passing t
On 6 May 2015 at 11:50, Ramana Radhakrishnan wrote:
> On Thu, Apr 30, 2015 at 6:49 PM, Yvan Roux wrote:
>> Hi,
>>
>> On 23 March 2015 at 18:47, Yvan Roux wrote:
>>> Hi,
>>>
>>> On 23 March 2015 at 17:08, Ramana Radhakrishnan
>>> wrote
Hi Christian,
On 4 May 2015 at 11:29, Christian Bruel wrote:
>
>> Hi Christian,
>> I noticed case gcc.dg/ipa/iinline-attr.c failed on aarch64. The
>> original patch is x86 specific, while the case is added as general
>> one. Could you please have a look at this?
>>
>> FAIL: gcc.dg/ipa/iinline-a
?
Thanks,
Yvan
2015-05-04 Yvan Roux
* gcc.target/arm/pr65067.c: Require Thumb2 effective target.
* gcc.target/arm/pr65924.c: Likewise.
diff --git a/gcc/testsuite/gcc.target/arm/pr65067.c
b/gcc/testsuite/gcc.target/arm/pr65067.c
index 9ddd7bb..05da294 100644
--- a/gcc/testsuite/gcc.target
Hi Marcus,
On 1 May 2015 at 17:18, Marcus Shawcroft wrote:
> On 1 May 2015 at 14:56, Yvan Roux wrote:
>
>> 2015-05-01 Yvan Roux
>>
>> * configure.ac: Add --enable-fix-cortex-a53-843419 option.
>> * configure: Regenerate.
>>
On 1 May 2015 at 13:39, Yvan Roux wrote:
> Hi Marcus,
>
> (Sorry wanted to cc you in my first mail but seems that gmail prefers
> Maxim to Marcus ! ;)
>
> On 1 May 2015 at 13:11, Marcus Shawcroft wrote:
>> On 1 May 2015 at 10:11, Yvan Roux wrote:
>>> Hi all,
&
Hi Marcus,
(Sorry wanted to cc you in my first mail but seems that gmail prefers
Maxim to Marcus ! ;)
On 1 May 2015 at 13:11, Marcus Shawcroft wrote:
> On 1 May 2015 at 10:11, Yvan Roux wrote:
>> Hi all,
>>
>> As described in the thread bellow, there is a link-time workaro
anks,
Yvan
2015-05-01 Yvan Roux
* configure.ac: Add --enable-fix-cortex-a53-843419 option.
* configure: Regenerate.
* config/aarch64/aarch64-elf-raw.h (CA53_ERR_843419_SPEC): Define.
(LINK_SPEC): Include CA53_ERR_843419_SPEC.
* config/aarch64/aarch64-linux.h (CA53_ERR_8
Hi,
On 23 March 2015 at 18:47, Yvan Roux wrote:
> Hi,
>
> On 23 March 2015 at 17:08, Ramana Radhakrishnan
> wrote:
>> On Wed, Mar 18, 2015 at 10:19 AM, Yvan Roux wrote:
>>> Hi,
>>>
>>> This is a fix for PR64208 where LRA loops when dealing with
>
Hi Kyrill,
On 29 April 2015 at 12:06, Kyrill Tkachov wrote:
> Hi Yvan,
>
> On 29/04/15 09:57, Yvan Roux wrote:
>>
>> Hi,
>>
>> here is the patch for PR65924, only tested on the original testcase so
>> far.
>
>
> Can you please double check that th
Hi,
here is the patch for PR65924, only tested on the original testcase so far.
Thanks
Yvan
gcc/
2015-04-29 Yvan Roux
PR target/65924
* config/arm/thumb2.md (*thumb2_addsi3_compare0_scratch): Fix operand
number in type attribute expression.
gcc/testsuite/
2015-04-29 Yvan Roux
Hi,
On 27 April 2015 at 15:58, Yvan Roux wrote:
> On 27 April 2015 at 15:20, Kyrill Tkachov wrote:
>> Hi Yvan,
>>
>>
>> On 27/04/15 13:25, Yvan Roux wrote:
>>>
>>> Hi,
>>>
>>> This is a follow-up of PR64208 where an LRA loop was
On 27 April 2015 at 15:20, Kyrill Tkachov wrote:
> Hi Yvan,
>
>
> On 27/04/15 13:25, Yvan Roux wrote:
>>
>> Hi,
>>
>> This is a follow-up of PR64208 where an LRA loop was due to redundancy
>> in insn's alternatives. I've checked all the insn
to have a real difference between alu or multiple
instruction and mov.
Bootstrapped and regtested on arm-linux-gnueabihf. Ok for trunk ?
Thanks,
Yvan
2015-04-27 Yvan Roux
* config/arm/arm.mb (*arm_movt): Fix type attribute.
(*movsi_compare0): Likewise.
(*cmpsi_shi
Hi,
On 14 April 2015 at 17:36, Vladimir Makarov wrote:
> On 04/14/2015 04:11 AM, Jakub Jelinek wrote:
>>
>> On Tue, Apr 14, 2015 at 10:08:24AM +0200, Yvan Roux wrote:
>>>
>>> --- a/gcc/lra-constraints.c
>>> +++ b/gcc/lra-constraints.c
>>> @@
On 14 April 2015 at 10:35, Ramana Radhakrishnan
wrote:
> On Tue, Apr 14, 2015 at 9:33 AM, Jakub Jelinek wrote:
>> On Tue, Apr 14, 2015 at 10:32:16AM +0200, Yvan Roux wrote:
>>> The issue is more related to armv6 than M profile, but if it is widely
>>> tested as well I
On 14 April 2015 at 10:19, Ramana Radhakrishnan
wrote:
> On Thu, Apr 9, 2015 at 12:10 PM, Yvan Roux wrote:
>> Hi
>>
>> On 7 April 2015 at 22:02, Yvan Roux wrote:
>>> On 7 April 2015 at 21:33, Jakub Jelinek wrote:
>>>> On Tue, Apr 07, 2015 at 09:28:51P
) ?
Thanks,
Yvan
gcc/
2015-04-13 Yvan Roux
PR target/65729
* lra-constraints.c (prohibited_class_reg_set_mode_p): Restore and fix
the assertion.
gcc/testsuite/
2015-04-13 Yvan Roux
PR target/65729
* gcc.target/arm/pr65729.c: New test.
On 10 April 2015 at 18:39, Vladimir
On 13 April 2015 at 15:42, Kyrill Tkachov wrote:
>
> On 09/04/15 12:10, Yvan Roux wrote:
>>
>> diff --git a/gcc/testsuite/gcc.target/arm/pr65648.c
>> b/gcc/testsuite/gcc.target/arm/pr65648.c
>> new file mode 100644
>> index 000..e075546
>> --- /dev/
On 13 April 2015 at 12:55, Kyrill Tkachov wrote:
>
> On 13/04/15 11:47, Yvan Roux wrote:
>>
>> Ping (now that stage1 is open)
>
> Hi Yvan,
>
> This patch is ok, but can you wait until GCC 5.1 is released before
> committing please?
> That way trunk and the GC
Ping (now that stage1 is open)
On 27 March 2015 at 19:14, Kyrill Tkachov wrote:
>
> On 24/03/15 19:53, Yvan Roux wrote:
>>
>> Hi,
>>
>> after the issue with duplicated alternatives exhibited by PR64208, I
>> checked the arm.md file and found that *arm_subsi3_i
Hi,
this patch adds the second testcase that was committed in 4.9 for
PR65647 on trunk.
Committed as rev 221981 and ChangeLog typos are fixed in 221982 and 221993 :/
2015-04-10 Yvan Roux
PR target/65647
* gcc.target/arm/pr65647-2.c: New.
diff --git a/gcc/testsuite/gcc.target
Hi
On 7 April 2015 at 22:02, Yvan Roux wrote:
> On 7 April 2015 at 21:33, Jakub Jelinek wrote:
>> On Tue, Apr 07, 2015 at 09:28:51PM +0200, Yvan Roux wrote:
>>> validation is ongoing, but here is my attempt to add this testcase,
>>> does it look correct (it's t
On 7 April 2015 at 21:33, Jakub Jelinek wrote:
> On Tue, Apr 07, 2015 at 09:28:51PM +0200, Yvan Roux wrote:
>> validation is ongoing, but here is my attempt to add this testcase,
>> does it look correct (it's the first time I use that kind of include
>> in testsuite)
Hi Jakub,
On 7 April 2015 at 17:51, Jakub Jelinek wrote:
> On Tue, Apr 07, 2015 at 11:01:59AM -0400, Vladimir Makarov wrote:
>> 2015-04-07 Vladimir Makarov
>>
>> PR target/65678
>> * lra-remat.c (do_remat): Process input and non-input insn
>> registers separately.
>
> D
64_64 and cross built and tested on
AArch64, arm, armeb and i686. Ok for 4.9 ?
Cheers,
Yvan
2015-04-05 Yvan Roux
Backport from trunk r221867
2015-04-04 Vladimir Makarov
PR target/65647
* lra.c (lra): Stop updating lra_constraint_new_regno_start
Hi Xingxing,
do you know if it is possible to test this patch inside Marvell (as it
is a fix for iWMMXT arch.) ?
Thanks a lot
Yvan
On 23 March 2015 at 18:47, Yvan Roux wrote:
> Hi,
>
> On 23 March 2015 at 17:08, Ramana Radhakrishnan
> wrote:
>> On Wed, Mar 18, 2015 at 1
scheduling as the type attribute affected to alt 4 is
alu_imm when it could only involve registers.
This is fixed by this small patch. Cross builded and regtested for
arm/armeb targets.
Ok for trunk (maybe for stage 1 as no PR is attached to that) ?
Cheers,
Yvan
2105-03-24 Yvan Roux
* config/arm
Hi,
On 23 March 2015 at 17:08, Ramana Radhakrishnan
wrote:
> On Wed, Mar 18, 2015 at 10:19 AM, Yvan Roux wrote:
>> Hi,
>>
>> This is a fix for PR64208 where LRA loops when dealing with
>> iwmmxt_arm_movdi insn. As explain in the PR, the issue was introduced
>>
Ping.
On 11 March 2015 at 16:38, Yvan Roux wrote:
> Hi,
>
>
>>>> PR ipa/65236
>>>> * cgraphunit.c (cgraph_node::expand_thunk): Enable return slot
>>>> opt.
>>
>> This bugfix adds ipa-icf-6.C test which failed on
On 18 March 2015 at 12:42, Yvan Roux wrote:
> HI Kyrill,
>
> On 18 March 2015 at 11:24, Kyrill Tkachov wrote:
>> Hi Yvan,
>>
>>
>> On 18/03/15 10:19, Yvan Roux wrote:
>>>
>>> Hi,
>>>
>>> This is a fix for PR64208 where LRA loo
HI Kyrill,
On 18 March 2015 at 11:24, Kyrill Tkachov wrote:
> Hi Yvan,
>
>
> On 18/03/15 10:19, Yvan Roux wrote:
>>
>> Hi,
>>
>> This is a fix for PR64208 where LRA loops when dealing with
>> iwmmxt_arm_movdi insn. As explain in the PR, the issue was in
(but not on an
IWMMXT one), is it ok for trunk and 4.9 branch ?
Rq: I think that adding IP and CC clobbers to
CALL_INSN_FUNCTION_USAGE, as specified by AAPCS, in 4.9 branch is
something we need too, I've a patch for that if you agree on that.
Thanks,
Yvan
2105-03-17 Yvan Roux
PR
Hi all
we have merged the gcc-4_9-branch into linaro/gcc-4_9-branch up to
revision 221341 as r221360. We have also backported this set of revisions:
* r212011 as r221216 : PR tree-optimization/61607
* r214942 as r221216 : Abstract away marking loops for removal
* r214957 as r221216 : Sanity chec
The 2 others introduce test cases that check
ipa-icf pass dumps, so I'm not sure if the code has to be backported.
bootstrapped/regtested on x86_64 and cross-compiled/regtested on
aarch64-linux-gnu
arm-linux-gnueabihf
armeb-linux-gnueabihf
i686-linux-gnu
Ok for 4.9 ?
Thanks
Yvan
-
Honza,
On 10 March 2015 at 20:09, Yvan Roux wrote:
> On 10 March 2015 at 19:18, Jan Hubicka wrote:
>>> Hi
>>>
>>> On 9 March 2015 at 17:07, Yvan Roux wrote:
>>> > Hi,
>>> >
>>> > As added in the PR, this issue is also present o
On 10 March 2015 at 19:18, Jan Hubicka wrote:
>> Hi
>>
>> On 9 March 2015 at 17:07, Yvan Roux wrote:
>> > Hi,
>> >
>> > As added in the PR, this issue is also present on 4.9 branch and
>> > affects at least arm-linux-gnueabihf target (as rep
Hi
On 9 March 2015 at 17:07, Yvan Roux wrote:
> Hi,
>
> As added in the PR, this issue is also present on 4.9 branch and
> affects at least arm-linux-gnueabihf target (as reported in PR61207).
>
> I've backported it in the 4.9 branch with the attached patch. The
> diff
gcc/
2015-03-09 Yvan Roux
Backport from trunk r220489.
2015-02-06 Jakub Jelinek
PR ipa/64896
* cgraphunit.c (cgraph_node::expand_thunk): If
restype is not is_gimple_reg_type nor the thunk_fndecl
returns aggregate_value_p, set restmp to a temporary variable
instead o
Hi all
we have merged the gcc-4_9-branch into linaro/gcc-4_9-branch up to
revision 219502 as r219549. We have also backported this set of revisions:
* r209620 as r219434 : [AArch64] Support SISD variants of SCVTF,UCVTF
* r209800 as r219597 : Add clobber_reg
* r211075 as r219465 : Add execution t
Hi all
we have merged the gcc-4_9-branch into linaro/gcc-4_9-branch up to
revision 218412 as r218423. We have also backported this set of revisions:
* r213382 as r218352 : [AArch64] arm_neon.h - add vpaddd_f64,
vpaddd_s64, vpaddd_u64 intrinsics
* r214008 as r218354 : [AArch64] Move some code aro
Hi all
we have merged the gcc-4_9-branch into linaro/gcc-4_9-branch up to
revision 216130 as r216256. We have also backported this set of revisions:
r209643 as 215975 : [AArch64] Define TARGET_FLAGS_REGNUM
r211881 as 215975 : PR target/61565
r213035 as 215846 : [AArch64] libitm: Improve _ITM_beg
Hi all
we have merged the gcc-4_9-branch into linaro/gcc-4_9-branch up to
revision 214896 as r215060. We have also backported this set of revisions:
r211717 as r214313 : [AArch32] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook
r212927 as r214314 : [AArch32] Enable arm target in
ira-shrinkwrap-prep* testc
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