Re: [PATCH] X86: Add an option -muse-unaligned-vector-move

2021-10-20 Thread Xu Dianhong via Gcc-patches
Many thanks for your explanation. I got the meaning of operands. The "addpd b(%rip), %xmm0" instruction needs "b(%rip)" aligned otherwise it will rise a "Real-Address Mode Exceptions". I haven't considered this situation "b(%rip)" has an address dependence of "a(%rip)" before. I think this situati

Re: [PATCH] X86: Add an option -muse-unaligned-vector-move

2021-10-20 Thread Xu Dianhong via Gcc-patches
Thanks for the comments. >Why would you ever want to have such option?! I need to ask @H. J. Lu for help to answer this question. He knows more about the background. I may not explain it clearly. >Should the documentation at least read "emit unaligned vector moves even for aligned storage or when

Re: [PATCH] X86: Add an option -muse-unaligned-vector-move

2021-10-20 Thread Xu Dianhong via Gcc-patches
Thanks for the comments. > And does it even work? It works, I checked it in the test case, and when using this option, it can emit an unaligned vector move. >I fail to see adjustments to memory operands of SSE/AVX instructions that have to be aligned I changed all vector move in "get_ssemov" witho