Hi Bernd,
First of all, my apologize for the late reply. I was in holidays the past week
to celebrate Chinese new year.
On Friday, February 12, 2016 05:28:43 PM Bernd Schmidt wrote:
> PR69714 is an issue where the bswap pass makes an incorrect
> transformation on big-endian targets. The source h
Ping?
On Monday, January 18, 2016 11:33:47 AM Thomas Preud'homme wrote:
> On Wednesday, January 13, 2016 06:39:20 PM Bernd Schmidt wrote:
> > On 01/12/2016 08:55 AM, Thomas Preud'homme wrote:
> > > On Monday, January 11, 2016 04:57:18 PM Bernd Schmidt wrote:
> >
On Thursday, January 21, 2016 09:21:52 AM Richard Biener wrote:
> On Thu, 21 Jan 2016, Thomas Preud'homme wrote:
> > On Friday, January 08, 2016 10:05:25 AM Richard Biener wrote:
> > > On Tue, 5 Jan 2016, Thomas Preud'homme wrote:
> > > > Hi,
> > >
On Friday, January 08, 2016 10:05:25 AM Richard Biener wrote:
> On Tue, 5 Jan 2016, Thomas Preud'homme wrote:
> > Hi,
> >
> > bswap optimization pass generate wrong code on big endian targets when the
> > result of a bit operation it analyzed is a partial load of
gt; Subject: Re: [PATCH, testsuite] Fix PR68632: gcc.target/arm/lto/pr65837
> failure on M profile ARM targets
>
> Hi Thomas,
>
>
> On 12/09/2015 10:57 AM, Thomas Preud'homme wrote:
> > gcc.target/arm/lto/pr65837 fails on M profile ARM targets because of
> lack of neon
On Wednesday, January 13, 2016 06:39:20 PM Bernd Schmidt wrote:
> On 01/12/2016 08:55 AM, Thomas Preud'homme wrote:
> > On Monday, January 11, 2016 04:57:18 PM Bernd Schmidt wrote:
> >> On 01/08/2016 10:33 AM, Thomas Preud'homme wrote:
> >
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015 1:58 PM
>
> Hi,
>
> We decided to apply the following patch to the ARM embedded 5 branch.
> This is *not* intended for
This patch solve this problem by replacing the static pass number in the
output by a star, allowing for a stable output while retaining easy copy/
pasting in shell.
ChangeLog entry is as follows:
*** gcc/testsuite/ChangeLog ***
2015-12-30 Thomas Preud'homme
* gcc.c-torture/
On Monday, January 11, 2016 04:57:18 PM Bernd Schmidt wrote:
> On 01/08/2016 10:33 AM, Thomas Preud'homme wrote:
> > 2016-01-08 Thomas Preud'homme
> >
> > * g++.dg/pr67989.C: Remove ARM-specific option.
> > * gcc.target/arm/pr67989.C: Ne
duplicated.
What about the following:
*** gcc/testsuite/ChangeLog ***
2016-01-08 Thomas Preud'homme
* g++.dg/pr67989.C: Remove ARM-specific option.
* gcc.target/arm/pr67989.C: New file.
diff --git a/gcc/testsuite/g++.dg/pr67989.C b/gcc/testsuite/
Ping?
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Wednesday, December 16, 2015 5:11 PM
> To: gcc-patches@gcc.gnu.org; Richard Earnshaw; Ramana Radhakrishnan;
> Kyrylo Tk
On Tuesday, January 05, 2016 10:47:38 AM Kyrill Tkachov wrote:
> Hi Thomas,
Hi Kyrill,
> >
> > diff --git a/gcc/testsuite/g++.dg/pr67989.C
> > b/gcc/testsuite/g++.dg/pr67989.C index
> > 90261c450b4b9429fb989f7df62f3743017c7363..61be8e172a96df5bb76f7ecd8543dadf
> > 825e7dc7 100644
> > --- a/gcc/t
-12-31 Thomas Preud'homme
* g++.dg/pr67989.C: Skip test if already running it with -mcpu or
-march with different value.
diff --git a/gcc/testsuite/g++.dg/pr67989.C b/gcc/testsuite/g++.dg/pr67989.C
index
90261c450b4b9429fb989f7df62f3743017
On Tuesday, January 05, 2016 01:53:37 PM you wrote:
>
> Regression testsuite was run on a bootstrapped native x86_64-linux-gnu GCC
> and on an arm-none-eabi GCC cross-compiler without any regression. I'm
> waiting for a slot on gcc110 to do a big endian bootstrap but at least the
> testcase works
into different byte
significance in the result. This patch first separate cmpxchg and cmpnop
adjustement into 2 steps and then deal with endianness correctly for the
second step.
ChangeLog entries are as follow:
*** gcc/ChangeLog ***
2015-12-16 Thomas Preud'homme
PR tree-op
> From: Gerald Pfeifer [mailto:ger...@pfeifer.com]
> Sent: Sunday, January 03, 2016 6:49 AM
>
> On Wed, 16 Dec 2015, Thomas Preud'homme wrote:
> > Currently, the documentation for --with-multilib-list in
> > gcc/doc/install.texi only mentions sh*-*-* and x86-64-*-lin
rements on Development
Tools (http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/index.html)
for further details.
*** gcc/ChangeLog ***
2015-10-27 Andre Vieira
Thomas Preud'homme
* gcc/config/arm/arm-builtins.c (arm_bu
geLog ***
*** gcc/ChangeLog ***
2015-10-27 Andre Vieira
Thomas Preud'homme
* gcc/config/arm/arm.c (detect_cmse_nonsecure_call): New.
(cmse_nonsecure_call_clear_caller_saved): New.
* gcc/config/arm/arm-protos.h (detect_cmse_nonsecure_cal
Thomas Preud'homme
* gcc/config/arm/arm.c (gimplify.h): New include.
(arm_handle_cmse_nonsecure_call): New.
(arm_attribute_table): Added cmse_nonsecure_call.
*** gcc/testsuite/ChangeLog ***
2015-10-27 Andre Vieira
Thomas Preud'hom
ng already as it is required by AAPCS.
*** gcc/ChangeLog ***
2015-10-27 Andre Vieira
Thomas Preud'homme
* gcc/config/arm/arm.c (output_return_instruction): Clear
registers.
(thumb2_expand_return): Likewise.
(thumb1_expand_epil
/ChangeLog ***
2015-10-27 Andre Vieira
Thomas Preud'homme
* gcc/config/arm/arm.c (use_return_insn): Change to return with bxns
when cmse_nonsecure_entry.
(output_return_instruction): Likewise.
(arm_output_function_prologue):
ons
(http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/index.html).
*** gcc/ChangeLog ***
2015-10-27 Andre Vieira
Thomas Preud'homme
* gcc/config/arm/arm.c (arm_handle_cmse_nonsecure_entry): New.
(arm_attribute_table): Added cmse_
[Sending on behalf of Andre Vieira]
Hello,
This patch adds RTL patterns for the push and pop instructions for thumb1.
These are needed by subsequent patches in the series.
*** gcc/ChangeLog ***
2015-10-27 Andre Vieira
Thomas Preud'homme
* gcc/config/ar
And even better, with the patch (see below ChangeLog entries)! Sigh...
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Saturday, December 26, 2015 9:41 AM
> To: gcc-patches@gcc.gnu.org; Richard Earnshaw; Ram
.com/help/topic/com.arm.doc.ecm0359818/index.html).
*** gcc/ChangeLog ***
2015-10-27 Andre Vieira
Thomas Preud'homme
* gcc/config.gcc (extra_headers): Added arm_cmse.h.
* gcc/config/arm/arm-arches.def (ARM_ARCH):
(armv8-m): Add FL2_CMSE.
[Sending on behalf of Andre Vieira]
Hello,
This patch series aims at implementing an alpha status support for ARMv8-M's
Security Extensions. It is only posted as RFC at this stage. You can find the
specification of ARMV8-M Security Extensions in: ARM®v8-M Security Extensions:
Requirements on D
cover letter.
ChangeLog entries are as follow:
*** gcc/ChangeLog ***
2015-12-17 Thomas Preud'homme
* config/arm/arm.h (TARGET_HAVE_LDACQ): Enable for ARMv8-M Mainline.
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index
1f79c37b5c36a410a2d500ba92c62a5ba4c
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Wednesday, December 16, 2015 8:04
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Wednesday, December 16, 2015
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Wednesday, December 16, 2015
Reverted now.
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Wednesday, December 09, 2015 5:56 PM
> To: gcc-patches@gcc.gnu.org
> Subject: [PATCH, testsuite] Fix PR68629: a
Hi,
> From: Jakub Jelinek [mailto:ja...@redhat.com]
> Sent: Thursday, December 17, 2015 4:26 PM
> > >
> > > > --- a/gcc/testsuite/lib/target-supports.exp
> > > > +++ b/gcc/testsuite/lib/target-supports.exp
> > > > @@ -1432,7 +1432,12 @@ proc check_effective_target_cilkplus { } {
> > > > if {
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015
for non ARMv8-M Thumb-1 target statically but
genattrtab is not currently capable to do it, so this is for a later patch.
[1] For a quick overview of ARMv8-M please refer to the initial cover letter.
ChangeLog entry is as follows:
*** gcc/ChangeLog ***
2015-11-13 Thomas Preud'
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015
is as follows:
*** gcc/ChangeLog ***
2015-11-13 Thomas Preud'homme
* config/arm/arm.h (TARGET_HAVE_MOVT): Include ARMv8-M as having MOVT.
* config/arm/arm.c (arm_arch_name): (const_ok_for_op): Check MOVT/MOVW
availability with TARGET_HAVE
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015
as needed.
[1] For a quick overview of ARMv8-M please refer to the initial cover letter.
ChangeLog entry is as follows:
*** gcc/ChangeLog ***
2015-11-09 Thomas Preud'homme
* config/arm/arm.h (TARGET_USE_MOVT): Check MOVT/MOVW availability
with TARGET_HAVE
[Fixed the subject and added ARM maintainers to recipient.]
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015 3:51 PM
> To: gcc-patches@gcc.gnu.org
&g
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015
on as the other
patches in the series are accepted.
[1] For a quick overview of ARMv8-M please refer to the initial cover letter.
ChangeLog entry is as follows:
*** gcc/ChangeLog ***
2015-11-06 Thomas Preud'homme
* config/arm/arm-protos.h: Reindent FL_FOR_* macro definitions.
Hi,
We decided to apply the following patch to the ARM embedded 5 branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Thursday, December 17, 2015
initial cover letter.
ChangeLog entries are as follow:
*** gcc/ChangeLog ***
2015-11-23 Thomas Preud'homme
* config/arm/arm-arches.def (armv8-m.base): Define new architecture.
(armv8-m.main): Likewise.
(armv8-m.main+dsp): Likewise
* config/arm/arm-pro
100644
--- a/libgcc/config/arm/t-softfp
+++ b/libgcc/config/arm/t-softfp
@@ -1,2 +1,2 @@
-softfp_wrap_start := '\#ifdef __ARM_ARCH_6M__'
+softfp_wrap_start := '\#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1'
softfp_wrap_end := '\#endif'
Best regards,
uard for DIV code to not apply to ARMv8-M Baseline
since it uses Thumb-2 instructions.
[1] For a quick overview of ARMv8-M please refer to the initial cover letter.
ChangeLog entries are as follow:
*** gcc/ChangeLog ***
2015-11-13 Thomas Preud'homme
* config/a
Hi,
I'll be posting a patch series intended for trunk whose aim is to add support
for ARMv8-M. This patch series does not include changes to support the security
extensions [nor does it include atomics for ARMv8-M Baseline]. This will be
posted as a separate patch series.
=== Quick overview o
o the user as to what multilib
should be built. To this effect, it takes a list of architecture at configure
time and that list needs to be passed down to t-baremetal Makefile to set the
multilib variables appropriately.
ChangeLog entry is as follows:
*** gcc/ChangeLog ***
2015-12-15 T
the code to
address both issues.
ChangeLog entry is as follows:
2015-11-24 Thomas Preud'homme
* config.gcc: Error out when conflicting multilib is detected. Do not
loop over multilibs since no combination is legal.
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 59
:
*** gcc/ChangeLog ***
2015-12-09 Thomas Preud'homme
* doc/install.texi (--with-multilib-list): Describe the meaning of the
option for arm*-*-* targets.
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 57399ed..2c93eb0 100644
--- a/gcc/doc/install.texi
+++
ing that the comparison is against constant
0.
ChangeLog entry is as follow:
*** gcc/ChangeLog ***
2015-12-07 Thomas Preud'homme
* config/arm/arm.c (thumb1_reorg): Check that the comparison is
against the constant 0.
diff --git a/gcc/config/arm/arm.c b/gcc/config/ar
gcc.target/arm/lto/pr65837 fails on M profile ARM targets because of lack of
neon instructions. This patch adds the necessary arm_neon_ok effective target
requirement to avoid running this test for such targets.
ChangeLog entry is as follows:
* gcc/testsuite/ChangeLog ***
2015-12-08 Thomas
an effective
target for attr-simd-3.c testcase.
ChangeLog entry is as follows:
*** gcc/testsuite/ChangeLog ***
2015-12-08 Thomas Preud'homme
PR testsuite/68629
* lib/target-supports.exp (check_effective_target_cilkplus): Also
check that compiling with -fcilkplus
We decided to apply this to ARM/embedded-5-branch.
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Andre Vieira
> Sent: Wednesday, October 28, 2015 1:03 AM
> To: gcc-patches@gcc.gnu.org
> Subject: Re:
missing type specifier and checking for .word and similar directive instead
of the number of movt.
The new test passes for all of -mcpu=cortex-m{3,4,7} but fail when removing the
-mslow-flash-data switch.
ChangeLog entry is as follows:
*** gcc/testsuite/ChangeLog ***
2015-11-04 Thomas
Committed as obvious with the following ChangeLog entry:
2015-08-25 Thomas Preud'homme
* config/arm/constraints.md: Also list Cs and US ARM-specific
constraints as used.
Best regards,
Thomas
Hi,
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Tuesday, July 28, 2015 3:04 PM
>
> > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> > ow...@gcc.gnu.org] On Behalf Of Thomas Preud&
ensure these
will be recomputed.
ChangeLog entries are as follows:
2015-07-31 Thomas Preud'homme
PR tree-optimization/67043
* loop-invariant.c (find_defs): Force recomputation of all luids.
2015-07-29 Thomas Preud'homme
PR tree-optimization/67043
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
>
> ChangeLog entry is as follows:
>
> 2015-07-28 Thomas Preud'homme
>
> PR tree-optimization/66828
> * tree-ssa-math-opts.c
value, converted to the result type, is the resulting value; otherwise, the
behavior is undefined."
ChangeLog entry is as follows:
2015-07-28 Thomas Preud'homme
PR tree-optimization/66828
* tree-ssa-math-opts.c (perform_symbolic_merge): Change type of inc
from i
> From: James Greenhalgh [mailto:james.greenha...@arm.com]
> Sent: Friday, June 26, 2015 6:15 PM
>
> This should already have been covered by:
>
> https://gcc.gnu.org/ml/gcc-patches/2015-06/msg01105.html
>
> 2015-06-16 James Greenhalgh
>
> * gcc.target/arm/pr65647.c: Do not ove
Thomas Preud'homme
* gcc.target/arm/pr65647.c: Restrict to ARMv6-M effective targets.
diff --git a/gcc/testsuite/gcc.target/arm/pr65647.c
b/gcc/testsuite/gcc.target/arm/pr65647.c
index d3b44b2..d828d23 100644
--- a/gcc/testsuite/gcc.target/arm/pr65647.c
+++ b/gcc/testsuite/gcc.t
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Wednesday, May 27, 2015 11:24 PM
> Ah, OK. I was looking at the code prior to the call for
> can_move_invariant_reg in move_invariant_reg which implies that DEST
> can
> be a subreg, but REG can not.
>
> But with that check in can_move_invariant_r
Ping?
> -Original Message-
> From: Thomas Preud'homme [mailto:thomas.preudho...@arm.com]
> Sent: Thursday, April 30, 2015 3:19 PM
> To: Thomas Preud'homme; Richard Earnshaw; 'gcc-patches@gcc.gnu.org';
> Marcus Shawcroft; Ramana Radhakrishnan
> (raman
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Saturday, May 23, 2015 6:54 AM
> >
> > - if (!can_move_invariant_reg (loop, inv, reg))
> > + if (!can_move_invariant_reg (loop, inv, dest))
> Won't this run into into the same problem if DEST is a SUBREG?
One of the very first test in can
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> > From: Steven Bosscher [mailto:stevenb@gmail.com]
> > Sent: Tuesday, May 19, 2015 7:21 PM
> >
> > Not OK.
> > This will break in move_inva
> From: Steven Bosscher [mailto:stevenb@gmail.com]
> Sent: Tuesday, May 19, 2015 7:21 PM
>
> Not OK.
> This will break in move_invariants() when it looks at REGNO (inv->reg).
Indeed. I'm even surprised all tests passed. Ok I will just prevent moving
in such a case. I'm running the tests now a
hat.
ChangeLog entries are as follow:
*** gcc/ChangeLog ***
2015-05-18 Thomas Preud'homme
PR rtl-optimization/66168
* loop-invariant.c (move_invariant_reg): Set inv->reg to destination
of inv->insn when moving an invariant without introducing a temporary
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Wednesday, May 13, 2015 4:05 AM
> OK for the trunk.
>
> Thanks for your patience,
Thanks. Committed with the added "PR rtl-optimization/64616" to both
ChangeLog entries.
Best regards,
Thomas
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
>
> > From: Jeff Law [mailto:l...@redhat.com]
> > Sent: Tuesday, May 12, 2015 4:17 AM
> >
> > >>
> > >> +
> > >>
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Tuesday, May 12, 2015 4:17 AM
>
> On 05/06/2015 03:47 AM, Thomas Preud'homme wrote:
> > Ping?
> Something to consider as future work -- I'm pretty sure PRE sets up the
> same kind of problematical pattern with a n
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
>
> Based on my understanding of your answer quoted above, I'll commit
> it as is, despite not having been able to come up with a testcase. I'll
> wait
targetting Cortex-M0,
Cortex-M3 and whatever default core for ARMv7-a with vfpv3-d16 FPU).
ChangeLog entry is as follows:
*** gcc/testsuite/ChangeLog ***
2015-05-04 Thomas Preud'homme
* gcc.target/arm/pr64616.c: Test dump rather than assembly to work
accross ARM targets.
diff
Ping?
Best regards,
Thomas
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Monday, March 16, 2015 8:39 PM
> To: 'Steven Bosscher'
> Cc: GCC Patches; Eric Botca
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Tuesday, April 28, 2015 12:27 AM
> OK. No need for heroics -- give it a shot, but don't burn an insane
> amount of time on it. If we can't get to a reasonable testcase, then so
> be it.
Ok, I tried but really didn't managed to create a testcase.
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Tuesday, April 28, 2015 12:27 AM
> To: Thomas Preud'homme; 'Eric Botcazou'
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH, combine] Try REG_EQUAL for nonzero_bits
>
> On 04/27/2015 04:26 AM, Thomas Pr
Here is an updated patch that prefix local symbols with __ for more safety.
They appear in the symtab as local so it is not strictly necessary but one is
never too cautious. Being local, they also do not generate any PLT entry.
They appear only because the jumps are from one section to another
(whi
> From: Marcus Shawcroft [mailto:marcus.shawcr...@gmail.com]
> Sent: Thursday, February 05, 2015 5:17 PM
> >
> > *** gcc/ChangeLog ***
> >
> > 2015-01-26 Thomas Preud'homme thomas.preudho...@arm.com
> >
> > * config.gcc: Add cortex-a57-f
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Saturday, April 25, 2015 2:57 AM
> > +static rtx
> > +sign_extend_short_imm (rtx src, machine_mode mode, unsigned int
> prec)
> > +{
> > + if (GET_MODE_PRECISION (mode) < prec && CONST_INT_P (src)
> > + && INTVAL (src) > 0 && val_signbit_know
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Saturday, April 25, 2015 3:00 AM
> Do you have a testcase where this change can result in better generated
> code. If so please add that testcase. It's OK if it's ARM specific.
Hi Jeff,
Last time I tried I couldn't reduce the code to a small tes
Hi,
first of all, sorry for the delay. We quickly entered stage 4 and I thought
it was best waiting for stage 1 to update you on this.
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
>
> Of course both approaches
I just committed the obvious fix below that fix build failure introduced by
revision 222371.
*** gcc/ChangeLog ***
2015-04-24 Thomas Preud'homme
* config/arm/unknown-elf.h (ASM_OUTPUT_ALIGNED_DECL_LOCAL): fix
ternary operator in fprintf and harmonize spacing.
diff --
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Friday, April 24, 2015 11:15 AM
>
> So revised review is "ok for the trunk" :-)
Committed.
Best regards,
Thomas
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Friday, April 24, 2015 10:59 AM
>
Hi Jeff,
> > +
> > +static bool
> > +cprop_reg_p (const_rtx x)
> > +{
> > + return REG_P (x) && !HARD_REGISTER_P (x);
> > +}
> How about instead this move to a more visible location (perhaps a macro
> in regs.h
Committed. I'll wait a week and then ask for approval for a backport to 5.1.1
once 5.1 is released.
Best regards,
Thomas
> -Original Message-
> From: Kenneth Zadeck [mailto:zad...@naturalbridge.com]
> Sent: Monday, April 20, 2015 9:26 PM
> To: Thomas Preud'ho
Ping?
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
> Sent: Tuesday, March 03, 2015 12:02 PM
> To: 'Bernhard Reutner-Fischer'; gcc-patches@gcc.gnu.org; 'Paolo Bo
se cprop_reg_p to check if register can be propagated.
(do_local_cprop): Use cprop_reg_p to check if register can be
propagated.
(implicit_set_cond_p): Likewise.
*** gcc/testsuite/ChangeLog ***
2015-04-15 Thomas Preud'homme
Steven Bosscher
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Monday, April 13, 2015 8:48 PM
> Thomas,
>
> I know there were several followups between Steven and yourself.
> With
> stage1 now open, can you post a final version and do a final
> bootstrap/test with it?
Sure, I'm testing it right now. Sorry for
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
>
> FYI testing your patch with the one cprop_reg_p negated as said in my
> previous email shows no regression on arm-none-eabi cross-compiler
> targeting Cortex
> From: Steven Bosscher [mailto:stevenb@gmail.com]
> Sent: Friday, March 20, 2015 8:14 PM
>
> I put the cprop_reg_p check there instead of !HARD_REGISTER_P
> because
> I like to be able to quickly find all places where a similar check is
> performed. The check is whether the reg is something t
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
>
> I noticed in do_local_cprop you replace >= FIRST_PSEUDO_REGISTER by
> cprop_reg_p without removing the REG_P as well.
Sorry, I missed the parenthesis. REG_P
Hi Steven,
> From: Steven Bosscher [mailto:stevenb@gmail.com]
> Sent: Friday, March 20, 2015 3:54 PM
>
>
> What I meant, is that I believe the tests are already done in
> hash_scan_set and should be redundant in cprop_insn (i.e. the test can
> be replaced with gcc_[checking_]assert).
Ok.
>
> From: Steven Bosscher [mailto:stevenb@gmail.com]
> Sent: Monday, March 09, 2015 7:48 PM
> To: Thomas Preud'homme
> Cc: GCC Patches; Eric Botcazou
> Subject: Re: [PATCH, stage1] Move insns without introducing new
> temporaries in loop2_invariant
New patch below.
> From: Richard Biener [mailto:rguent...@suse.de]
> Sent: Friday, March 13, 2015 5:02 PM
> >
> > Is this ok for stage1? It's not a bug but it helps debuggability so is
> > this something we might consider backporting?
>
> It's ok now given you bootstrapped the change.
I did + regression testsuite
angeLog entry is as follows:
*** gcc/ChangeLog ***
2015-03-10 Thomas Preud'homme
* graph.c (print_graph_cfg): Make function names visible and append
parenthesis to it. Also make groups of basic blocks belonging to the
same function visible.
diff --git a/gcc/grap
> From: Steven Bosscher [mailto:stevenb@gmail.com]
> Sent: Monday, March 09, 2015 7:48 PM
> To: Thomas Preud'homme
> Cc: GCC Patches; Eric Botcazou
> Subject: Re: [PATCH, stage1] Move insns without introducing new
> temporaries in loop2_invariant
>
> On Thu, Ma
> From: Jiong Wang [mailto:jiong.w...@arm.com]
> Sent: Friday, March 06, 2015 8:10 PM
>
> On 05/03/15 09:53, Thomas Preud'homme wrote:
> > *** gcc/testsuite/ChangeLog ***
> >
> > 2015-02-16 Thomas Preud'homme
> >
> > * gcc.dg/loop-7
/ChangeLog ***
2015-03-05 Thomas Preud'homme
PR tree-optimization/63743
* cfgexpand.c (reorder_operands): Also reorder if only second operand
had its definition forwarded by TER.
*** gcc/testsuite/ChangeLog ***
2015-03-05 Thomas Preud'homme
PR tree-op
> From: Richard Biener [mailto:richard.guent...@gmail.com]
> Sent: Thursday, March 05, 2015 7:12 PM
> >
> > loop header
> > start of loop body
> > //stuff
> > (set (reg 128) (const_int 0))
> > //other stuff
> > end of loop body
> >
> > becomes:
> >
> > (set (reg 129) (const_int 0))
> > loop header
loop that could end up reaching one of the use.
[1] https://gcc.gnu.org/ml/gcc-patches/2015-02/msg00933.html
ChangeLog entries are as follows:
*** gcc/ChangeLog ***
2015-02-16 Thomas Preud'homme
* dominance.c (nearest_common_dominator_for_set): Fix A_Dominated_by_B
code
Ping?
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
[SNIP]
> >
> > Likewise for the REG_P and ">= FIRST_PSEUDO_REGISTER" tests here
> > (with
> > the equivalent and IMHO prefe
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