[PATCH] Regenerate opt.urls

2024-04-09 Thread Tatsuyuki Ishi
Fixes: 97069657c4e ("RISC-V: Implement TLS Descriptors.") gcc/ChangeLog: * config/riscv/riscv.opt.urls: Regenerated. --- gcc/config/riscv/riscv.opt.urls | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/config/riscv/riscv.opt.urls b/gcc/config/riscv/riscv.opt.urls index da31820e23

[PATCH v5] RISC-V: Implement TLS Descriptors.

2024-03-28 Thread Tatsuyuki Ishi
This implements TLS Descriptors (TLSDESC) as specified in [1]. The 4-instruction sequence is implemented as a single RTX insn for simplicity, but this can be revisited later if instruction scheduling or more flexible RA is desired. The default remains to be the traditional TLS model, but can be c

Re: [PATCH v3] RISC-V: Implement TLS Descriptors.

2023-12-05 Thread Tatsuyuki Ishi
> On Nov 21, 2023, at 15:59, Fangrui Song wrote: > > On Mon, Nov 20, 2023 at 6:20 AM Tatsuyuki Ishi <mailto:ishitatsuy...@gmail.com>> wrote: >> >> This implements TLS Descriptors (TLSDESC) as specified in [1]. >> >> The 4-instruction sequen

[PATCH v4] RISC-V: Implement TLS Descriptors.

2023-12-04 Thread Tatsuyuki Ishi
This implements TLS Descriptors (TLSDESC) as specified in [1]. The 4-instruction sequence is implemented as a single RTX insn for simplicity, but this can be revisited later if instruction scheduling or more flexible RA is desired. The default remains to be the traditional TLS model, but can be c

Re: [PATCH v3] RISC-V: Implement TLS Descriptors.

2023-11-23 Thread Tatsuyuki Ishi
> On Nov 23, 2023, at 19:57, Florian Weimer wrote: > > * Tatsuyuki Ishi: > >> I've considered gating this behind a GAS feature test, but it seems >> nontrivial especially for restricting the variants available at runtime. >> Since TLS descriptors is not s

Re: [PATCH v3] RISC-V: Implement TLS Descriptors.

2023-11-20 Thread Tatsuyuki Ishi
> On Nov 21, 2023, at 15:59, Fangrui Song wrote: > > On Mon, Nov 20, 2023 at 6:20 AM Tatsuyuki Ishi <mailto:ishitatsuy...@gmail.com>> wrote: >> >> This implements TLS Descriptors (TLSDESC) as specified in [1]. >> >> The 4-instruction sequen

[PATCH v3] RISC-V: Implement TLS Descriptors.

2023-11-20 Thread Tatsuyuki Ishi
This implements TLS Descriptors (TLSDESC) as specified in [1]. The 4-instruction sequence is implemented as a single RTX insn for simplicity, but this can be revisited later if instruction scheduling or more flexible RA is desired. The default remains to be the traditional TLS model, but can be c

Re: [PATCH v2] RISC-V: Implement TLS Descriptors.

2023-11-15 Thread Tatsuyuki Ishi
> On Nov 16, 2023, at 14:33, Fangrui Song wrote: > > On Wed, Nov 15, 2023 at 9:23 PM Jeff Law wrote: >> >> >> >> On 11/15/23 18:51, Tatsuyuki Ishi wrote: >>>> On Nov 16, 2023, at 10:07, Jeff Law wrote: >> >>> >>> Ba

Re: [PATCH v2] RISC-V: Implement TLS Descriptors.

2023-11-15 Thread Tatsuyuki Ishi
> On Nov 16, 2023, at 10:07, Jeff Law wrote: > > > > On 9/8/23 04:49, Tatsuyuki Ishi via Gcc-patches wrote: >> This implements TLS Descriptors (TLSDESC) as specified in [1]. >> In TLSDESC instruction sequence, the first instruction relocates against >> the targ

Re: [PATCH v2] RISC-V: Implement TLS Descriptors.

2023-11-15 Thread Tatsuyuki Ishi
> On Nov 16, 2023, at 10:17, Fangrui Song wrote: > > On Mon, Oct 2, 2023 at 7:10 AM Kito Cheng > wrote: >> >> Just one nit and one more comment for doc: >> >> Could you add some doc something like that? mostly I grab from other >> target, so you can just included i

Re: [PATCH] Do not prepend target triple to -fuse-ld=lld,mold.

2023-11-08 Thread Tatsuyuki Ishi
> On Nov 7, 2023, at 23:37, Richard Biener wrote: > > On Tue, 7 Nov 2023, Tatsuyuki Ishi wrote: > >>> On Oct 16, 2023, at 18:16, Richard Biener wrote: >>> >>> On Mon, 16 Oct 2023, Tatsuyuki Ishi wrote: >>> >>>> >>>>

Re: [PATCH] Do not prepend target triple to -fuse-ld=lld,mold.

2023-11-07 Thread Tatsuyuki Ishi
> On Oct 16, 2023, at 18:16, Richard Biener wrote: > > On Mon, 16 Oct 2023, Tatsuyuki Ishi wrote: > >> >> >>> On Oct 16, 2023, at 17:55, Richard Biener wrote: >>> >>> On Mon, 16 Oct 2023, Tatsuyuki Ishi wrote: >>> >&g

Re: [PATCH] Do not prepend target triple to -fuse-ld=lld,mold.

2023-10-16 Thread Tatsuyuki Ishi
> On Oct 16, 2023, at 17:55, Richard Biener wrote: > > On Mon, 16 Oct 2023, Tatsuyuki Ishi wrote: > >> >> >>> On Oct 16, 2023, at 17:39, Richard Biener wrote: >>> >>> On Mon, 16 Oct 2023, Tatsuyuki Ishi wrote: >>> >>

Re: [PATCH] Do not prepend target triple to -fuse-ld=lld,mold.

2023-10-16 Thread Tatsuyuki Ishi
> On Oct 16, 2023, at 17:39, Richard Biener wrote: > > On Mon, 16 Oct 2023, Tatsuyuki Ishi wrote: > >> lld and mold are platform-agnostic and not prefixed with target triple. >> Prepending the target triple makes it less likely to find the intended >> linker

[PATCH] Do not prepend target triple to -fuse-ld=lld,mold.

2023-10-15 Thread Tatsuyuki Ishi
lld and mold are platform-agnostic and not prefixed with target triple. Prepending the target triple makes it less likely to find the intended linker executable. A potential breaking change is that we no longer try to search for triple-prefixed lld/mold binaries anymore. However, since there doesn

[PATCH v2] RISC-V: Implement TLS Descriptors.

2023-09-08 Thread Tatsuyuki Ishi via Gcc-patches
This implements TLS Descriptors (TLSDESC) as specified in [1]. In TLSDESC instruction sequence, the first instruction relocates against the target TLS variable, while subsequent instructions relocates against the address of the first. Such usage of labels are not well-supported within GCC. Due to

[PATCH] RISC-V: Implement TLS Descriptors.

2023-08-17 Thread Tatsuyuki Ishi via Gcc-patches
This implements TLS Descriptors (TLSDESC) as specified in [1]. In TLSDESC instruction sequence, the first instruction relocates against the target TLS variable, while subsequent instructions relocates against the address of the first. Such usage of labels are not well-supported within GCC. Due to