Looking at the latest version of the Power Vector Intrinsic Programming
Reference (Revision 2.0.0_prd, Bill slipped this to me for review), I see
that
vec_test_lsbb_all_ones
vec_test_lsbb_all_zeros
both specify vector unsigned char, only.
On Mon, Aug 5, 2024 at 1:15 AM Kewen.Lin wrote:
> on 2024
--- Begin Message ---
This has a simple fix that I have tested on power8 and Seurer are
tested on power9.
While there may be a more elegent coding for the require casts, this is
the simplest change, considering the current stage.
2018-02-09 Steven Munroe
* config/rs6000/mmintrin.h
A small thinko in the implementation of _mm_add_pi32 that only shows
when compiling for power9.
./gcc/ChangeLog:
2017-11-15 Steven Munroe
* config/rs6000/mmintrin.h (_mm_add_pi32[_ARCH_PWR]): Correct
parameter list for vec_splats.
Index: gcc/config/rs6000/mmintrin.h
On Wed, 2017-10-25 at 18:37 -0500, Segher Boessenkool wrote:
> Hi!
>
> On Tue, Oct 17, 2017 at 01:27:16PM -0500, Steven Munroe wrote:
> > This it part 2/2 for contributing PPC64LE support for X86 SSE2
> > instrisics. This patch includes testsuite/gcc.target tests for the
&g
On Mon, 2017-10-23 at 16:21 -0500, Segher Boessenkool wrote:
> Hi!
>
> On Tue, Oct 17, 2017 at 01:24:45PM -0500, Steven Munroe wrote:
> > Some inline assembler is required. There a several cases where we need
> > to generate Data Cache Block instruction. There are no exi
the double to and
from 32-bit float and int required assembler to the correct semantics
at reasonable cost. Perhaps these can be revisited when the team
completes the builtins for vec_double* and vec_float*.
part 2 adds the associated 131 DG test cases.
./gcc/ChangeLog:
2017-10-17 Ste
On Thu, 2017-08-17 at 00:47 -0500, Segher Boessenkool wrote:
> On Wed, Aug 16, 2017 at 03:50:55PM -0500, Steven Munroe wrote:
> > This it part 3/3 for contributing PPC64LE support for X86 SSE
> > instrisics. This patch includes testsuite/gcc.target tests for the
> > i
On Thu, 2017-08-17 at 00:28 -0500, Segher Boessenkool wrote:
> Hi!
>
> On Wed, Aug 16, 2017 at 03:35:40PM -0500, Steven Munroe wrote:
> > +extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__,
> > __artificial__))
> > +_mm_add_ss (__m128 __A, __m
are
associated with unions defined in m128-check.h (ported with minimal
change from i386). This removes some noise from make check.
[gcc/testsuite]
2017-08-16 Steven Munroe
* gcc.target/powerpc/m128-check.h: New file.
* gcc.target/powerpc/sse-check.h: New file
tform solution.
./gcc/ChangeLog:
2017-08-16 Steven Munroe
* config.gcc (powerpc*-*-*): Add xmmintrin.h and mm_malloc.h.
* config/rs6000/xmmintrin.h: New file.
* config/rs6000/x86intrin.h [__ALTIVEC__]: Include xmmintrin.h.
Index: gcc/confi
ill be needed by
xmmintrin.h and cleans up some noisy warnings from the previous MMX
commit.
Part 2 adds the xmmintrin.h include and associated config.gcc and
x86intrin.h changes
part 3 adds the associated DG test cases.
./gcc/ChangeLog:
2017-08-16 Steven Munroe
* config/rs6000/mm_
On Wed, 2017-07-19 at 16:42 -0500, Segher Boessenkool wrote:
> Hi Steve,
>
> On Wed, Jul 19, 2017 at 10:14:01AM -0500, Steven Munroe wrote:
> > This it part 2/2 for contributing PPC64LE support for X86 MMX
> > instrisics. This patch adds the DG tests to verify the header
On Wed, 2017-07-19 at 12:45 -0500, Segher Boessenkool wrote:
> On Tue, Jul 18, 2017 at 05:10:42PM -0500, Steven Munroe wrote:
> > On Tue, 2017-07-18 at 16:54 -0500, Segher Boessenkool wrote:
> > > On Mon, Jul 17, 2017 at 01:28:20PM -0500, Steven Munroe wrote:
> > > >
This it part 2/2 for contributing PPC64LE support for X86 MMX
instrisics. This patch adds the DG tests to verify the headers contents.
Oddly there are very few MMX specific included in i386 so I had to adapt
some the SSE tested to smaller vector size.
[gcc/testsuite]
2017-07-18 Steven Munroe
On Tue, 2017-07-18 at 16:54 -0500, Segher Boessenkool wrote:
> Hi!
>
> On Mon, Jul 17, 2017 at 01:28:20PM -0500, Steven Munroe wrote:
> > After a resent GCC change the previously submitted BMI/BMI2 intrinsic
> > test started to fail with the fo
Correct the problems Segher found in review and added a changes to deal
with the fallout from the __builtin_cpu_supports warning for older
distros.
Tested on P8 LE and P6/P7/P8 BE. No new tests failures.
./gcc/ChangeLog:
2017-07-17 Steven Munroe
* config.gcc (powerpc*-*-*): Add
PORTS__ is defined.
[gcc/testsuite]
2017-07-17 Steven Munroe
*gcc.target/powerpc/bmi-check.h (main): Skip unless
__BUILTIN_CPU_SUPPORTS__ defined.
*gcc.target/powerpc/bmi2-check.h (main): Skip unless
__BUILTIN_CPU_SUPPORTS__ defined.
Index: gcc/testsuite/
power8, are available for efficient implementation of these transfers.
This patch submission includes just the config.gcc and associated MMX
headers changes to make the review more manageable. A separate patch for
the DG test cases will follow.
./gcc/ChangeLog:
2017-07-06 Steven Munroe
On Tue, 2017-06-20 at 17:16 -0500, Segher Boessenkool wrote:
> On Tue, Jun 20, 2017 at 09:34:25PM +, Joseph Myers wrote:
> > On Tue, 20 Jun 2017, Segher Boessenkool wrote:
> >
> > > > And as you see see below the gcc.target tests have to be duplicated
> > > > anyway. Even if the C code is comm
On Tue, 2017-06-20 at 09:04 +, Hurugalawadi, Naveen wrote:
> Hi Joesph,
>
> Thanks for your review and valuable comments on this issue.
>
> Please find attached the patch that merges x86-intrinsics for AArch64 and PPC
> architectures.
>
> >> it would seem to me to be a bad idea to duplicate
} { "-mcpu=*" }
{ "-mcpu=power7" } }
and
dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } }
To ward off the evil spirits
Tests on BE --with-cpu=power6 -m32/-m64 and LE --with-cpu=power8. All
bmi/bmi2 intrinsic tests pasted.
[gcc/testsuite]
20
On Tue, 2017-05-30 at 17:26 -0500, Segher Boessenkool wrote:
> On Fri, May 26, 2017 at 10:32:54AM -0500, Steven Munroe wrote:
> > * gcc.target/powerpc/bmi2-pdep32-1.c []: Add -mcpu=power7 to
> > dg-options. Change dg-require-effective-target powerpc_vsx_ok
> >
later.
[gcc/testsuite]
2017-05-26 Steven Munroe
* gcc.target/powerpc/bmi2-pdep32-1.c []: Add -mcpu=power7 to
dg-options. Change dg-require-effective-target powerpc_vsx_ok
to vsx_hw.
* gcc.target/powerpc/bmi2-pdep64-1.c: Likewise.
* gcc.target/powerpc
. The solution is to guard the
test code with #ifdef _ARCH_PWR7 so that it does not attempt to use
instructions that are not there.
However for dg-compile test bmi2-pext64-1a.c we have no alternative to
add -mcpu=power7 to dg-options.
[gcc/testsuite]
2017-05-24 Steven Munroe
On Wed, 2017-05-17 at 17:22 -0400, David Edelsohn wrote:
> On Wed, May 17, 2017 at 4:56 PM, Steven Munroe
> wrote:
> > David pointed out that I my earlier X86 BMI intrinsic header submission
> > was causing make check failures on on powerpc64le platforms. The patch
> > bel
quick test.
Thanks.
[gcc/testsuite]
2017-05-17 Steven Munroe
* gcc.target/powerpc/bmi-andn-1.c: Fix-up dg-options.
* gcc.target/powerpc/bmi-andn-2.c: Fix-up dg-options.
* gcc.target/powerpc/bmi-bextr-1.c: Fix-up dg-options.
* gcc.target/powerpc/bmi-bextr-2.c: F
On Fri, 2017-05-12 at 11:38 -0700, Mike Stump wrote:
> On May 8, 2017, at 7:49 AM, Steven Munroe wrote:
> > Of course as part of this process we will port as many of the
> > corresponding DejaGnu tests from gcc/testsuite/gcc.target/i386/ to
> > gcc/testsuite/gcc.target/powerp
On Thu, 2017-05-11 at 09:39 -0500, Segher Boessenkool wrote:
> On Wed, May 10, 2017 at 12:59:28PM -0500, Steven Munroe wrote:
> > > That is just for the testsuite; I meant what happens if a user tries
> > > to use it with an older target (or BE, or 32-bit)? Is there a useful
On Tue, 2017-05-09 at 16:03 -0500, Segher Boessenkool wrote:
> On Tue, May 09, 2017 at 02:33:00PM -0500, Steven Munroe wrote:
> > On Tue, 2017-05-09 at 12:23 -0500, Segher Boessenkool wrote:
> > > On Mon, May 08, 2017 at 09:49:57AM -0500, Steven Munroe wrote:
> > > >
On Tue, 2017-05-09 at 12:23 -0500, Segher Boessenkool wrote:
> Hi!
>
> On Mon, May 08, 2017 at 09:49:57AM -0500, Steven Munroe wrote:
> > Thus I would like to restrict this support to PowerPC
> > targets that support VMX/VSX and PowerISA-2.07 (power8) and later.
>
> Wh
I include the BMI intrinsics ported to PowerPC
for review as they are reasonable size (31 intrinsic implementations).
[gcc]
2017-05-04 Steven Munroe
* config.gcc (powerpc*-*-*): Add bmi2intrin.h, bmiintrin.h,
and x86intrin.h
* config/rs6000/bmiintrin.h: New file.
On Wed, 2015-05-20 at 14:40 -0400, David Edelsohn wrote:
> The current definition of _GLIBC_READ_MEM_BARRIER in libstdc++ is too
> weak for an ACQUIRE FENCE, which is what it is intended to be. The
> original code emitted an "isync" instead of "lwsync".
>
> All of the guard acquire and set code ne
On Fri, 2014-05-02 at 12:13 +0200, Jakub Jelinek wrote:
> Hi!
>
> On Tue, Apr 29, 2014 at 06:30:32PM -0400, Michael Meissner wrote:
> > This patch adds support for a new type (__float128) on the PowerPC to allow
> > people to use the 128-bit IEEE floating point format instead of the
> > tradition
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