(Pinging since I realised that this is required for my later Low Overhead Loop
patch series to work)
Ok for trunk with the updated changelog that Christophe mentioned?
Thanks,
Stamatis/Stam Markianos-Wright
From: Stam Markianos-Wright
Sent: Tuesday, August 1
Following Andrea's overhaul of the MVE testsuite, these tests are now
reduntant, as equivalent checks have been added to the each intrinsic's
.c test.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c: Removed.
* gcc.target/arm/mve/intrinsics/mve_vaddq_m.c:
These newly updated tests were rewritten by Andrea. Some of them
needed further manual fixing as follows:
* The #shift immediate value not in the check-function-bodies as expected
* The ACLE was specifying sub-optimal code: lsr+and instead of ubfx. In
this case the test rewritten from the ACLE h
From: Andrea Corallo
Hi all,
this patch fixes the vstrwq* MVE instrinsics failing to emit the
correct sequence of instruction due to a missing predicate. Also the
immediate range is fixed to be multiples of 2 up between [-252, 252].
Best Regards
Andrea
gcc/ChangeLog:
* config/arm/c
Hi all,
This is a simple testsuite tidy-up patch, addressing to types of errors:
* The vcmp vector-scalar tests failing due to the compiler's preference
of vector-vector comparisons, over vector-scalar comparisons. This is
due to the lack of cost model for MVE and the compiler not knowing that
th
a BFI.
Ok for trunk?
Thanks,
Stam Markianos-Wright
gcc/ChangeLog:
* config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
(__arm_vadcq_u32): Likewise.
(__arm_vadcq_m_s32): Likewise.
(__arm_vadcq_m_u32): Likewise.
(__arm_vsbcq_s32): Likewise.
We found this as part of the wider testsuite updates.
The applicable tests are authored by Andrea earlier in this patch series
Ok for trunk?
gcc/ChangeLog:
* config/arm/arm_mve.h (__arm_vbicq): Change coerce on
scalar constant.
---
gcc/config/arm/arm_mve.h | 16
We found this as part of the wider testsuite updates.
The applicable tests are authored by Andrea earlier in this patch series
Ok for trunk?
gcc/ChangeLog:
* config/arm/arm_mve.h (__arm_vbicq): Change coerce on
scalar constant.
(__arm_vmvnq_m): Likewise.
---
gcc/config/
These newly updated tests were rewritten by Andrea. Some of them
needed further manual fixing as follows:
* The #shift immediate value not in the check-function-bodies as expected
* The ACLE was specifying sub-optimal code: lsr+and instead of ubfx. In
this case the test rewritten from the ACLE h
Following Andrea's overhaul of the MVE testsuite, these tests are now
reduntant, as equivalent checks have been added to the each intrinsic's
.c test.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c: Removed.
* gcc.target/arm/mve/intrinsics/mve_vaddq_m.c:
Hi all,
This is a simple testsuite tidy-up patch, addressing to types of errors:
* The vcmp vector-scalar tests failing due to the compiler's preference
of vector-vector comparisons, over vector-scalar comparisons. This is
due to the lack of cost model for MVE and the compiler not knowing that
th
a BFI.
Ok for trunk?
Thanks,
Stam Markianos-Wright
gcc/ChangeLog:
* config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
(__arm_vadcq_u32): Likewise.
(__arm_vadcq_m_s32): Likewise.
(__arm_vadcq_m_u32): Likewise.
(__arm_vsbcq_s32): Likewise.
From: Alexandre Oliva
Back in September last year, some of the vmsr and vmrs patterns had an
extraneous blank removed, and the case of register names lowered, but
another instance remained, and so did a testcase.
for gcc/ChangeLog
* config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank aft
We found this as part of the wider testsuite updates.
The applicable tests are authored by Andrea earlier in this patch series
Ok for trunk?
gcc/ChangeLog:
* config/arm/arm_mve.h (__arm_vorrq): Add _n variant.
---
gcc/config/arm/arm_mve.h | 10 +-
1 file changed, 9 insertions(+
From: Andrea Corallo
Hi all,
this patch fixes the vstrwq* MVE instrinsics failing to emit the
correct sequence of instruction due to a missing predicate. Also the
immediate range is fixed to be multiples of 2 up between [-252, 252].
Best Regards
Andrea
gcc/ChangeLog:
* config/arm/c
es` to map
from vctp unspecs to number of lanes, and `arm_get_required_vpr_reg`
to check an insn to see if it requires the VPR or not.
No regressions on arm-none-eabi with various targets and on
aarch64-none-elf. Thoughts on getting this into trunk?
Thank you,
Stam Markianos-Wri
ce2` between
`__fp16` and `float16_t`.
The solution here is to break the _Generic down, so that the similar
types don't appear at the same level, as is done in `__ARM_mve_typeid`.
Ok for trunk?
Thanks,
Stam Markianos-Wright
gcc/ChangeLog:
PR target/96795
PR target/107515
On 12/12/2022 13:42, Kyrylo Tkachov wrote:
Hi Stam,
-Original Message-
From: Stam Markianos-Wright
Sent: Friday, December 9, 2022 1:32 PM
To: gcc-patches@gcc.gnu.org
Cc: Kyrylo Tkachov ; Richard Earnshaw
; Ramana Radhakrishnan
; ni...@redhat.com
Subject: [PATCH] Fix memory
Hi all,
In the M-Class Arm-ARM:
https://developer.arm.com/documentation/ddi0553/bu/?lang=en
these MVE instructions only have '!' writeback variant and at:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107714
we found that the Um constraint would also allow through a
register offset writeback,
ce2` between
`__fp16` and `float16_t`.
The solution here is to break the _Generic down, so that the similar
types don't appear at the same level, as is done in `__ARM_mve_typeid`.
Ok for trunk?
Thanks,
Stam Markianos-Wright
gcc/ChangeLog:
PR target/96795
PR target/107515
On 11/15/22 15:51, Andre Vieira (lists) wrote:
On 11/11/2022 17:40, Stam Markianos-Wright via Gcc-patches wrote:
Hi all,
This is the 2/2 patch that contains the functional changes needed
for MVE Tail Predicated Low Overhead Loops. See my previous email
for a general introduction of MVE LOLs
Markianos-Wright
Subject: [PATCH 15/35] arm: Explicitly specify other float types for _Generic
overloading [PR107515]
From: Stam Markianos-Wright
This patch adds explicit references to other float types
to __ARM_mve_typeid in arm_mve.h. Resolves PR 107515:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id
On 11/18/22 16:58, Kyrylo Tkachov wrote:
-Original Message-
From: Andrea Corallo
Sent: Thursday, November 17, 2022 4:38 PM
To: gcc-patches@gcc.gnu.org
Cc: Kyrylo Tkachov ; Richard Earnshaw
; Stam Markianos-Wright
Subject: [PATCH 15/35] arm: Explicitly specify other float types for
On 11/18/22 16:49, Kyrylo Tkachov wrote:
-Original Message-
From: Andrea Corallo
Sent: Thursday, November 17, 2022 4:38 PM
To: gcc-patches@gcc.gnu.org
Cc: Kyrylo Tkachov ; Richard Earnshaw
; Stam Markianos-Wright
Subject: [PATCH 13/35] arm: further fix overloading of MVE vaddq[_m
insn to see if it requires the VPR or not.
No regressions on arm-none-eabi with various targets and on
aarch64-none-elf. Thoughts on getting this into trunk?
Thank you,
Stam Markianos-Wright
gcc/ChangeLog:
* config/aarch64/aarch64.md: Add extra doloop_end arg.
* config/ar
On 29/03/2021 10:20, Richard Biener wrote:
On Fri, 26 Mar 2021, Richard Sandiford wrote:
Richard Biener writes:
On Wed, 24 Mar 2021, Stam Markianos-Wright wrote:
Hi all,
This patch resolves bug:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96974
This is achieved by forcing a re
On 24/03/2021 13:46, Richard Biener wrote:
On Wed, 24 Mar 2021, Stam Markianos-Wright wrote:
Hi all,
This patch resolves bug:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96974
This is achieved by forcing a re-calculation of *stmt_vectype_out if an
incompatible combination of
Hi all,
This patch resolves bug:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96974
This is achieved by forcing a re-calculation of *stmt_vectype_out if an
incompatible combination of TYPE_VECTOR_SUBPARTS is detected, but with
an extra introduced max_nunits ceiling.
I am not 100% sure if thi
On 26/11/2020 09:01, Christophe Lyon wrote:
On Wed, 25 Nov 2020 at 14:24, Stam Markianos-Wright via Gcc-patches
wrote:
Hi all,
A while back I submitted GCC10 commit:
44f77a6dea2f312ee1743f3dde465c1b8453ee13
for PR91816.
Turns out I was an idiot and forgot to include the test in the
/msg02010.html
See the attached diffs that have been rebased and apply cleanly.
Tested on a cross arm-none-eabi and also in a Cortex A-15 bootstrap with
no regressions.
Ok to backport?
Thanks,
Stam Markianos-Wright
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index
also in a
Cortex A-15 bootstrap with no regressions.
Submitting this as Obvious to gcc-11 and backporting to gcc-10.
Thanks,
Stam Markianos-Wright
gcc/testsuite/ChangeLog:
PR target/91816
* gcc.target/arm/pr91816.c: New test.
diff --git a/gcc/testsuite/gcc.target/arm/pr91816.c b/gcc
On 2/11/20 10:25 AM, Kyrill Tkachov wrote:
Hi Stam,
On 2/10/20 1:35 PM, Stam Markianos-Wright wrote:
On 2/3/20 11:20 AM, Stam Markianos-Wright wrote:
>
>
> On 1/27/20 3:54 PM, Stam Markianos-Wright wrote:
>>
>> On 1/16/20 4:05 PM, Stam Markianos-Wright wrote:
>&g
On 2/3/20 11:20 AM, Stam Markianos-Wright wrote:
On 1/27/20 3:54 PM, Stam Markianos-Wright wrote:
On 1/16/20 4:05 PM, Stam Markianos-Wright wrote:
On 1/10/20 6:48 PM, Stam Markianos-Wright wrote:
On 12/18/19 1:25 PM, Stam Markianos-Wright wrote:
On 12/13/19 10:22 AM, Stam
On 2/4/20 12:02 PM, Richard Sandiford wrote:
Stam Markianos-Wright writes:
On 1/31/20 1:45 PM, Richard Sandiford wrote:
Stam Markianos-Wright writes:
On 1/30/20 10:01 AM, Richard Sandiford wrote:
Stam Markianos-Wright writes:
On 1/29/20 12:42 PM, Richard Sandiford wrote:
Stam
On 1/31/20 1:45 PM, Richard Sandiford wrote:
Stam Markianos-Wright writes:
On 1/30/20 10:01 AM, Richard Sandiford wrote:
Stam Markianos-Wright writes:
On 1/29/20 12:42 PM, Richard Sandiford wrote:
Stam Markianos-Wright writes:
Hi all,
This fixes:
https://gcc.gnu.org/bugzilla
On 1/27/20 3:54 PM, Stam Markianos-Wright wrote:
On 1/16/20 4:05 PM, Stam Markianos-Wright wrote:
On 1/10/20 6:48 PM, Stam Markianos-Wright wrote:
On 12/18/19 1:25 PM, Stam Markianos-Wright wrote:
On 12/13/19 10:22 AM, Stam Markianos-Wright wrote:
Hi all,
This patch adds the
On 1/30/20 10:01 AM, Richard Sandiford wrote:
Stam Markianos-Wright writes:
On 1/29/20 12:42 PM, Richard Sandiford wrote:
Stam Markianos-Wright writes:
Hi all,
This fixes:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93300
Genmodes.c was generating the "wider_mode" chain
On 1/28/20 10:35 AM, Kyrill Tkachov wrote:
Hi Stam,
On 1/8/20 3:18 PM, Stam Markianos-Wright wrote:
On 12/10/19 5:03 PM, Kyrill Tkachov wrote:
Hi Stam,
On 11/15/19 5:26 PM, Stam Markianos-Wright wrote:
Pinging with more correct maintainers this time :)
Also would need to backport to
On 1/29/20 12:42 PM, Richard Sandiford wrote:
Stam Markianos-Wright writes:
Hi all,
This fixes:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93300
Genmodes.c was generating the "wider_mode" chain as follows:
HF -> BF -> SF - > DF -> TF -> VOID
This caused issues
- > DF -> TF -> BF -> VOID
This fixes the existing ICE seen by PR93300 (hence providing this with no
explicit test) and causes no further regressions.
Reg-tested on arm-none-eabi, aarch64-none-elf and bootstrapped on a Cortex-A15.
Ok for trunk?
Cheers,
Stam
gcc/ChangeLog:
202
/testsuite/ChangeLog:
2020-01-27 Stam Markianos-Wright
* gcc.target/arm/armv8_2-fp16-move-1.c: Update following load/store
optimisation.
diff --git a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-move-1.c b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-move-1.c
index 2321dd38cc6
On 1/16/20 4:06 PM, Stam Markianos-Wright wrote:
>
>
> On 1/8/20 3:18 PM, Stam Markianos-Wright wrote:
>>
>>
>> On 12/10/19 5:03 PM, Kyrill Tkachov wrote:
>>> Hi Stam,
>>>
>>> On 11/15/19 5:26 PM, Stam Markianos-Wright wrote
On 1/16/20 4:05 PM, Stam Markianos-Wright wrote:
>
>
> On 1/10/20 6:48 PM, Stam Markianos-Wright wrote:
>>
>>
>> On 12/18/19 1:25 PM, Stam Markianos-Wright wrote:
>>>
>>>
>>> On 12/13/19 10:22 AM, Stam Markianos-Wright wrote:
>>>
On 1/20/20 1:07 PM, Christophe Lyon wrote:
> Hi,
>
>
> On Thu, 16 Jan 2020 at 16:59, Stam Markianos-Wright
> wrote:
>>
>>
>>
>> On 1/13/20 10:05 AM, Kyrill Tkachov wrote:
>>> Hi Stam,
>>>
>>> On 1/10/20 6:45 PM, Stam Markia
On 1/8/20 3:18 PM, Stam Markianos-Wright wrote:
>
>
> On 12/10/19 5:03 PM, Kyrill Tkachov wrote:
>> Hi Stam,
>>
>> On 11/15/19 5:26 PM, Stam Markianos-Wright wrote:
>>> Pinging with more correct maintainers this time :)
>>>
>>> Also wo
On 1/10/20 6:48 PM, Stam Markianos-Wright wrote:
>
>
> On 12/18/19 1:25 PM, Stam Markianos-Wright wrote:
>>
>>
>> On 12/13/19 10:22 AM, Stam Markianos-Wright wrote:
>>> Hi all,
>>>
>>> This patch adds the ARMv8.6 Extension ACLE intrinsics
On 1/9/20 3:48 PM, Richard Sandiford wrote:
> OK, thanks.
>
Committed as r10-6004-g8c197c851e7528baba7cb837f34c05ba2242f705
Thank you!
Stam
> Richard
>
> Stam Markianos-Wright writes:
>> On 12/30/19 10:21 AM, Richard Sandiford wrote:
>>> Stam Markianos-Wright
mitted as r10-6006-gf275d73a57f1e5a07fbd4978f4b4457a5eaa1e39
Thank you!
Stam
> Richard
>
> Stam Markianos-Wright writes:
>> On 12/30/19 10:29 AM, Richard Sandiford wrote:
>>> Stam Markianos-Wright writes:
>>>> diff --git a/gcc/config/aarch64/aarch64-simd.md
On 1/13/20 10:43 AM, Kyrill Tkachov wrote:
> Hi Stam,
>
> On 1/10/20 6:47 PM, Stam Markianos-Wright wrote:
>> Hi all,
>>
>> This patch is part 2 of Bfloat16_t enablement in the ARM back-end.
>>
>> This new type is constrained using
On 1/13/20 10:05 AM, Kyrill Tkachov wrote:
> Hi Stam,
>
> On 1/10/20 6:45 PM, Stam Markianos-Wright wrote:
>> Hi all,
>>
>> This is a respin of patch:
>>
>> https://gcc.gnu.org/ml/gcc-patches/2019-12/msg01448.html
>>
>> which has now
On 1/10/20 4:29 PM, Richard Sandiford wrote:
> Stam Markianos-Wright writes:
>> On 1/9/20 4:13 PM, Stam Markianos-Wright wrote:
>>> On 1/9/20 4:07 PM, Richard Sandiford wrote:
>>>> Stam Markianos-Wright writes:
>>>>> diff --git a/gcc/testsuite/g++.
On 1/9/20 3:42 PM, Richard Sandiford wrote:
> Thanks for the update, looks great.
>
> Stam Markianos-Wright writes:
>> diff --git a/gcc/config/aarch64/arm_bf16.h b/gcc/config/aarch64/arm_bf16.h
>> new file mode 100644
>> index
>> 000
On 12/18/19 1:25 PM, Stam Markianos-Wright wrote:
>
>
> On 12/13/19 10:22 AM, Stam Markianos-Wright wrote:
>> Hi all,
>>
>> This patch adds the ARMv8.6 Extension ACLE intrinsics for dot product
>> operations (vector/by element) to the ARM back-end.
>>
&
-products/processors/b/ml-ip-blog/posts/bfloat16-processing-for-neural-networks-on-armv8_2d00_a
gcc/ChangeLog:
2020-01-10 Stam Markianos-Wright
* config/arm/arm.c
(arm_invalid_conversion): New function for target hook.
(arm_invalid_unary_op): New function for target
/bfloat16-processing-for-neural-networks-on-armv8_2d00_a
gcc/ChangeLog:
2020-01-10 Stam Markianos-Wright
* config.gcc: Add arm_bf16.h.
* config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
(arm_simd_builtin_std_type): Add BFmode
On 1/9/20 4:13 PM, Stam Markianos-Wright wrote:
>
>
> On 1/9/20 4:07 PM, Richard Sandiford wrote:
>> Stam Markianos-Wright writes:
>>> diff --git a/gcc/testsuite/g++.target/aarch64/bfloat_cpp_typecheck.C
>>> b/gcc/testsuite/g++.target/aarch64/bfloat_cpp_typ
On 1/9/20 4:07 PM, Richard Sandiford wrote:
> Stam Markianos-Wright writes:
>> diff --git a/gcc/testsuite/g++.target/aarch64/bfloat_cpp_typecheck.C
>> b/gcc/testsuite/g++.target/aarch64/bfloat_cpp_typecheck.C
>> new file mode 100644
>> index 000..55cbb0b0ef
On 1/7/20 5:14 PM, Richard Sandiford wrote:
> Thanks for the update. The new patch looks really good, just some
> minor comments.
>
> Stam Markianos-Wright writes:
>> [...]
>> Also I've update the filenames of all our tests to make them
On 1/7/20 3:26 PM, Richard Sandiford wrote:
> Stam Markianos-Wright writes:
>> On 12/19/19 10:08 AM, Richard Sandiford wrote:
>>> Stam Markianos-Wright writes:
>>>> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
>>>> index
On 12/30/19 10:29 AM, Richard Sandiford wrote:
> Stam Markianos-Wright writes:
>> diff --git a/gcc/config/aarch64/aarch64-simd.md
>> b/gcc/config/aarch64/aarch64-simd.md
>> index
>> adfda96f077075ad53d4bea2919c4d3b326e49f5..7587bc46ba1c80389ea49fa83a0e6f8a48971
On 12/30/19 10:21 AM, Richard Sandiford wrote:
> Stam Markianos-Wright writes:
>> On 12/20/19 2:13 PM, Richard Sandiford wrote:
>>> Stam Markianos-Wright writes:
>>>> +**...
>>>> +**ret
>>>> +*/
>>>> +int32x2_t ufoo (int32x2_t r
On 12/10/19 5:03 PM, Kyrill Tkachov wrote:
> Hi Stam,
>
> On 11/15/19 5:26 PM, Stam Markianos-Wright wrote:
>> Pinging with more correct maintainers this time :)
>>
>> Also would need to backport to gcc7,8,9, but need to get this approved
>> first!
>>
&
On 12/19/19 10:08 AM, Richard Sandiford wrote:
> Stam Markianos-Wright writes:
>> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
>> index f57469b6e23..f40f6432fd4 100644
>> --- a/gcc/config/aarch64/aarch64.c
>> +++ b/gcc/config/aarch
On 23/12/2019 16:57, Richard Sandiford wrote:
> Stam Markianos-Wright writes:
>> On 12/19/19 10:01 AM, Richard Sandiford wrote:
>>>> +
>>>> +#pragma GCC push_options
>>>> +#pragma GCC target ("arch=armv8.2-a+bf16")
>>>> +#ifd
On 12/20/19 2:36 PM, Richard Sandiford wrote:
> Stam Markianos-Wright writes:
>> Hi all,
>>
>> This patch adds the ARMv8.6 Extension ACLE intrinsics for the bfloat bfdot
>> operation.
>>
>> The functions are declared in arm_neon.h with the armv8.2-
On 12/20/19 2:13 PM, Richard Sandiford wrote:
> Stam Markianos-Wright writes:
>> diff --git a/gcc/config/aarch64/aarch64-simd.md
>> b/gcc/config/aarch64/aarch64-simd.md
>> index
>> ad4676bc167f08951e693916c7ef796e3501762a..eba71f004ef67af654f9c512b720aa6cfdd1d
On 12/19/19 10:01 AM, Richard Sandiford wrote:
> Stam Markianos-Wright writes:
>> [...]
>> @@ -659,6 +666,8 @@ aarch64_simd_builtin_std_type (machine_mode mode,
>> return float_type_node;
>> case E_DFmode:
>> return double_type_node;
>&g
Details on ARM Bfloat can be found here:
https://community.arm.com/developer/ip-products/processors/b/ml-ip-blog/posts/bfloat16-processing-for-neural-networks-on-armv8_2d00_a
gcc/ChangeLog:
2019-12-16 Stam Markianos-Wright
* config.gcc: Add arm_bf16.h.
* config/arm
,
Stam
gcc/ChangeLog:
2019-11-04 Stam Markianos-Wright
* config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
* config/aarch64/aarch64-simd.md
(aarch64_bfdot, aarch64_bfdot_lane): New.
* config
On 12/18/19 4:47 PM, Richard Sandiford wrote:
> Stam Markianos-Wright writes:
>> On 12/13/19 11:15 AM, Richard Sandiford wrote:
>>> Stam Markianos-Wright writes:
>>>> Hi all,
>>>>
>>>> This small patch adds support for the ARM v8.6 extensio
On 12/13/19 11:02 AM, Richard Sandiford wrote:
> Stam Markianos-Wright writes:
>> @@ -573,6 +586,44 @@
>> [(set_attr "type" "neon_dot")]
>> )
>>
>> +;; These instructions map to the __builtins for the armv8.6a I8MM usdot,
Hi all,
I have committed the attached patch adding myself to the Write After
Approval section of the MAINTAINERS file.
Cheers,
Stam
(commits r279573, r279575)
2019-12-19 Stam Markianos-Wright
* MAINTAINERS (write_after_approval): Add myself.
diff --git a/MAINTAINERS b/MAINTAINERS
/developer/ip-products/processors/b/ml-ip-blog/posts/bfloat16-processing-for-neural-networks-on-armv8_2d00_a
PS. I don't have commit rights, so if someone could commit on my behalf,
that would be great :)
gcc/ChangeLog:
2019-12-16 Stam Markianos-Wright
* config/aarch64/aarc
geLog:
2019-12-16 Stam Markianos-Wright
* config.gcc: Add arm_bf16.h.
* config/aarch64/aarch64-builtins.c
(aarch64_simd_builtin_std_type): Add BFmode.
(aarch64_init_simd_builtin_types): Add element types for vector types.
(aarch64_init_bf16_types)
On 12/13/19 10:22 AM, Stam Markianos-Wright wrote:
> Hi all,
>
> This patch adds the ARMv8.6 Extension ACLE intrinsics for dot product
> operations (vector/by element) to the ARM back-end.
>
> These are:
> usdot (vector), dot (by element).
>
> The functions are
On 12/13/19 11:15 AM, Richard Sandiford wrote:
> Stam Markianos-Wright writes:
>> Hi all,
>>
>> This small patch adds support for the ARM v8.6 extensions +bf16 and
>> +i8mm to the testsuite. This will be tested through other upcoming
>> patches, which is why
have commit rights, so if someone could commit on my behalf,
that would be great :)
gcc/ChangeLog:
2019-11-28 Stam Markianos-Wright
* config/arm/arm-builtins.c (enum arm_type_qualifiers):
(USTERNOP_QUALIFIERS): New define.
(USMAC_LANE_QUADTUP_QUALIFIERS): New d
x27;t have commit rights, so if someone could commit on my behalf,
that would be great :)
gcc/ChangeLog:
2019-11-28 Stam Markianos-Wright
* config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers)
New qualifier_lane_quadtup_index, TYPES_TERNOP
12-11 Stam Markianos-Wright
* lib/target-supports.exp
(check_effective_target_arm_v8_2a_i8mm_ok_nocache): New.
(check_effective_target_arm_v8_2a_i8mm_ok): New.
(add_options_for_arm_v8_2a_i8mm): New.
(check_effective_target_arm_v8_2a_bf16_neon_ok_nocache)
On 12/11/19 3:48 AM, Jeff Law wrote:
> On Mon, 2019-12-09 at 13:40 +0000, Stam Markianos-Wright wrote:
>>
>> On 12/3/19 10:31 AM, Stam Markianos-Wright wrote:
>>>
>>> On 12/2/19 9:27 PM, Joseph Myers wrote:
>>>> On Mon, 2 Dec 2019, Jeff Law wrote:
On 12/2/19 4:43 PM, Stam Markianos-Wright wrote:
>
>
> On 11/15/19 5:26 PM, Stam Markianos-Wright wrote:
>> Pinging with more correct maintainers this time :)
>>
>> Also would need to backport to gcc7,8,9, but need to get this approved
>>
On 12/3/19 10:31 AM, Stam Markianos-Wright wrote:
>
>
> On 12/2/19 9:27 PM, Joseph Myers wrote:
>> On Mon, 2 Dec 2019, Jeff Law wrote:
>>
>>>> 2019-11-13 Stam Markianos-Wright
>>>>
>>>> * real.c (struct ar
On 12/2/19 9:27 PM, Joseph Myers wrote:
> On Mon, 2 Dec 2019, Jeff Law wrote:
>
>>> 2019-11-13 Stam Markianos-Wright
>>>
>>> * real.c (struct arm_bfloat_half_format,
>>> encode_arm_bfloat_half, decode_arm_bfloat_half): New.
>>
On 11/15/19 5:26 PM, Stam Markianos-Wright wrote:
> Pinging with more correct maintainers this time :)
>
> Also would need to backport to gcc7,8,9, but need to get this approved
> first!
>
> Thank you,
> Stam
>
>
> Forwarded Message
> S
On 11/25/19 2:54 PM, Stam Markianos-Wright wrote:
>
> On 11/15/19 12:02 PM, Stam Markianos-Wright wrote:
>> Hi all,
>>
>> This patch adds support for a new real_format for ARM Brain Floating
>> Point numbers to the middle end. This is to be used exclusively in t
On 11/15/19 12:02 PM, Stam Markianos-Wright wrote:
> Hi all,
>
> This patch adds support for a new real_format for ARM Brain Floating
> Point numbers to the middle end. This is to be used exclusively in the
> ARM back-end.
>
> The encode_arm_bfloat_half and decode_arm_
, 21 Oct 2019 10:37:09 +0100
From: Stam Markianos-Wright
To: Ramana Radhakrishnan
CC: gcc-patches@gcc.gnu.org , nd ,
James Greenhalgh , Richard Earnshaw
On 10/13/19 4:23 PM, Ramana Radhakrishnan wrote:
>>
>> Patch bootstrapped and regression tested on arm-none-linux-gnueabihf,
>&
sanity.
Is this ok for trunk?
Also, I do not have commit rights, so could someone commit this on my
behalf?
Thank you!
Stam Markianos-Wright
2019-11-13 Stam Markianos-Wright
* real.c (struct arm_bfloat_half_format,
encode_arm_bfloat_half, decode_arm_bfloat_half): New
On 10/13/19 4:23 PM, Ramana Radhakrishnan wrote:
>>
>> Patch bootstrapped and regression tested on arm-none-linux-gnueabihf,
>> however, on my native Aarch32 setup the test times out when run as part
>> of a big "make check-gcc" regression, but not when run individually.
>>
>> 2019-10-11 Stamati
Patch also regression tested on arm-none-eabi, arm-none-linux-gnueabi
with no issues.
Also, I don't have commit rights yet, so could someone commit it on my
behalf?
Thanks,
Stam Markianos-Wright
gcc/ChangeLog:
2019-10-11 Stamatis Markianos-Wright
* config/arm/arm.md: Update b f
ot;asimdfml".
Cross-compiled and tested on aarch64-none-linux-gnu.
Is this ok for trunk?
Also, I don't have commit rights, so could someone commit it on my behalf?
Thanks,
Stam Markianos-Wright
The diff is:
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def
b/gcc
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