[PATCH] RISC-V: Rename conflicting variables in gen-riscv-ext-texi.cc

2025-05-18 Thread Songhe Zhu
major/minor to major_version/minor_version. Signed-off-by: Songhe Zhu --- gcc/config/riscv/gen-riscv-ext-texi.cc | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/gcc/config/riscv/gen-riscv-ext-texi.cc b/gcc/config/riscv/gen-riscv-ext-texi.cc index e15fdb

[PATCH] RISC-V: Rename conflicting variables in gen-riscv-ext-texi.cc

2025-05-18 Thread Songhe Zhu
major/minor to major_version/minor_version. Signed-off-by: Songhe Zhu --- gcc/config/riscv/gen-riscv-ext-texi.cc | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/gcc/config/riscv/gen-riscv-ext-texi.cc b/gcc/config/riscv/gen-riscv-ext-texi.cc index e15fdbf36f6..6fec17

[PATCH] RISC-V: Fix loss of function to script 'multilib-generator'

2023-03-21 Thread Songhe Zhu
'rv32imc', 'rv32imac'] will change to ['rv32imac', 'rv32imc'] through function:unique(alts) processing, This is the wrong alts should not be changed. This patch fix it. gcc/ChangLog: * config/riscv/multilib-generator: Adjusting the loop of 'alt'