[AARCH64][Insn classification unification 4/N] load/store types

Hi, This patch is part of the ongoing work to unify instruction classification between the ARM and AARCH64 backends. This patch adds "load_acq" and "store_rel" types for classifying load acquire and store release instructions respectively. It also updates the ARMv8 pipeline descriptions. OK for

[AARCH64][Insn classification unification 2/N] Add cortex-a53 pipeline description

Hi, This patch is part of the ongoing work to unify instruction classification between the ARM and AARCH64 backends. This patch wires up the cortex-a53 pipeline description defined in the ARM backend to be used in the AARCH46 backend. OK for trunk? Thanks Sofiane - ChangeLog * co

[ARM][Insn classification refactoring 7/N] Factor out common scheduling dependency routines

Hi, This patch is part of the ongoing work of ARM/AARCH64 instruction classification cleanup. This patches moves the scheduling dependency routines from arm.c into a new file aarch-common.c, preparing them to be used in AARCH64. OK for trunk? Thanks Sofiane - ChangeLog: * config.

[ARM][Insn classification refactoring 7/N] Factor out "type" attribute

Hi, This patch is part of the ongoing work of ARM/AARCH64 instruction classification cleanup. This patches moves the "type" attribute, and the related "mul32" and "mul64" from arm.md to a new file types.md, preparing it to be included in AARCH64. OK for trunk? Thanks Sofiane - ChangeLog:

[ARM][Insn classification refactoring 6/N] Delete "insn" attribute and update MOV classification

Hi, This patch is part of the ongoing work of ARM instruction classification cleanup. This patch deletes the "insn" attribute and moves the MOV/MVN instruction classification to the "type" attribute, where it is split into several types for a finer-grained classification. This has been tested wi

[ARM][Insn classification refactoring 4/N] Cleanup "insn" attribute

Hi, This patch is the part of the ongoing work of ARM instruction classification cleanup. This patch deletes redundant values "mrs", "msr", "xtab" and "sat" from the "insn" attribute, and moves the "clz" value to the "type" attribute. The remaining values "mov" and "mvn" will be dealt with in a s

[ARM][Insn classification refactoring 2/N] Update instruction classification documentation

Hi, This patch updates the documentation for "type" attribute. It complements the changes proposed in the previous patch OK for trunk? - Thanks Sofiane arm-update-insn-class-doc.diff Description: Binary data

[ARM][Insn classification refactoring 1/N] Move mult/div attribute values from "insn" to "type

Hi, This is the first of a series of patches to implement a single, unified and fine grained instruction classification attribute. The first few patches will propose a refactoring of the instruction classifications we currently have in place. This first patch moves the multiplication and divisio

[AArch64] Add r<-w alternative to aarch64_dup_lane

Hi, This patch adds a r<-w alternative to the aarch64_dup_lane pattern and updates the testcase gcc.target/aarch64/scalar_intrinsics.c accordingly. The patch has been successfully tested on a full regression run in aarch64-none-elf. OK for trunk? - Thanks Sofiane aarch64-dup-alternative.d

[AArch64] Fix move_lo_quad_ move

Hi, This patch fixes a bug in the move_lo_quad_ pattern. The pattern, shown below, issues a scalar MOV instruction for vector modes: (define_insn "move_lo_quad_" [(set (match_operand:VQ 0 "register_operand" "=w,w,w") (vec_concat:VQ (match_operand: 1 "register_operand" "w,r,r"

[AArch64] Split simd combine

Hi, This patch split the simd aarch64_combine pattern. This passes the full regression test suite in aarch64-elf. OK for trunk? - Thanks Sofiane aarch64-split-simd-combine.diff Description: Binary data

[AARCH64] Set "simd" attribute for *movdi_aarch64 pattern

Hi, This patch defines the "simd" attribute for the *movdi_aarch64 pattern. Tested successfully with a full regression run on aarch64-elf. OK for trunk? Thanks Sofiane aarch64-set-simd-att.diff Description: Binary data

[AARCH64] Refactor simd_mov split

Hi, This patch refactors the simd_mov split and fixes a few coding style issues. Tested successfully on a full aarch64-elf regression run. OK for trunk? Thanks Sofiane aarch64-refactor-simd-mov.diff Description: Binary data

[AArch64] Split aarch64_combine pattern

Hi, The attached patch is part of the ongoing work to enhance instruction scheduling opportunities in AArch64. This patch splits the aarch64_combine pattern, which used to issue 2 consecutive instructions. Tested successfully with a full aarch64-elf regression run. OK for trunk? Thanks Sofiane

[AARCH64] Split aarch64_simd_mov pattern

Hi, The attached patch is part of the ongoing work to enhance instruction scheduling opportunities in AArch64. This patch splits 2 alternatives of the aarch64_simd_mov pattern, which used to issue 2 consecutive instructions. Tested successfully with a full aarch64-elf regression run. OK for trun

[AARCH64] Split movtf_aarch64 pattern

Hi, The attached patch is part of the ongoing work to enhance instruction scheduling opportunities in AArch64. This patch splits a few alternatives of the movtf_aarch64 pattern, which used to issue 2 consecutive instructions. Tested successfully with a full aarch64-elf regression run. OK for tru

[AARCH64] Fix mov_aarch64/SHORT regression

Hi, This patch fixes a regression caused by recent changes to *mov_aarch64/SHORT. One of the pattern alternatives is trying to issue a SIMD instruction with -mgeneral-regs-only. The proposed fix is to define the "simd" attribute on the pattern in question. Thanks Sofiane - ChangeLog:

Add AARCH64 to config-list.mk

Hi, This patch adds AARCH64 support to contrib/config-list.mk. Thanks Sofiane - ChangeLog: 2013-04-22 Sofiane Naci * config-list.mk (LIST): Add aarch64-elf and aarch64-linux-gnu. aarch64-update-config-list.patch Description: Binary data

[AARCH64] Add SHORT scalar load/store using B/H registers

Hi, This patch adds support in AArch64 for scalar loads and stores to and from B/H registers. This has been tested with a full regression run on aarch64-elf. OK for trunk and 4.8? Thanks Sofiane - 2013-03-28 Sofiane Naci * config/aarch64/aarch64.md (*mov_aarch64): Add variants

[AARCH64] Add SHORT scalar move

Hi, This patch adds support in AArch64 for scalar moves to and from vector registers in SHORT modes. This has been tested with a full regression run on aarch64-elf. OK for trunk and 4.8? Thanks Sofiane - 2013-03-28 Sofiane Naci * config/aarch64/aarch64.md (*mov_aarch64): Add

[PATCH][AARCH64] Restrict "m" constraint for narrow moves

Hi, Loads and stores with PC-relative addresses are not supported for SHORT modes. This patch fixes a silent bug and implements this restriction for the generic "m" constraint. Tested successfully on aarch64-none-elf. OK for trunk? Thanks Sofiane - 2013-03-25 So

[AARCH64-4.7] Merge from upstream gcc-4_7-branch r194062

Hi, I have just merged upstream gcc-4_7-branch into ARM/aarch64-4.7-branch, up to r194062. This merge didn't cause any regressions. Thanks Sofiane

[AARCH64-4.7] Merge from upstream gcc-4_7-branch r193800

Hi, I have just merged upstream gcc-4_7-branch into ARM/aarch64-4.7-branch, up to r193800. This merge didn't cause any regressions. Thanks Sofiane

[PATCH][AARCH64] Refactor constant generation

Hi, Constant building in the AArch64 backend spits out assembly code, which affects scheduling of the generated code. This patch rewrites the code to use RTL patterns. A full aarch64-none-elf regression run shows no issues. Thanks Sofiane - ChangeLog: 2012-11-26 Sofiane Naci

[AARCH64-4.7] Merge from upstream gcc-4_7-branch r192902

Hi, I have just merged upstream gcc-4_7-branch into ARM/aarch64-4.7-branch, up to r192902. Thanks Sofiane

[AARCH64] Merge from upstream trunk r192598

Hi, I have merged upstream trunk into ARM/aarch64-branch, up to r192598. Thanks Sofiane

[AARCH64-4.7] Merge from upstream gcc-4_7-branch r192597

Hi, I have just merged upstream gcc-4_7-branch on the aarch64-4.7-branch up to r192597. Thanks Sofiane

[AARCH64-4.7] Fix constraint and attribute for logical immediate instructions

Hi, I've just committed the attached patch on ARM/AArch64-4.7 branch. It fixes a constraint and a scheduling attribute for the3 pattern. Thanks Sofiane aarch64-update-logical-imm.patch Description: Binary data

[AARCH64] Fix constraint and attribute for logical immediate instructions

Hi, I've just committed the attached patch on ARM/AArch64 branch. It fixes a constraint and a scheduling attribute for the3 pattern. Thanks Sofiane aarch64-update-logical-imm.patch Description: Binary data

[AARCH64] Merge from upstream trunk r192445

Hi, I have just merged upstream trunk on the aarch64-branch up to r192445. Thanks Sofiane

[AARCH64-4.7] Merge from upstream gcc-4_7-branch r192444

Hi, I have just merged upstream gcc-4_7-branch on the aarch64-4.7-branch up to r192444. Thanks Sofiane

[AARCH64] Merge from upstream trunk r192192

Hi, I have just merged upstream trunk on the aarch64-branch up to r192192. Thanks Sofiane

[AARCH64-4.7] Merge from upstream gcc-4_7-branch r192191

Hi, I have just merged upstream gcc-4_7-branch on the aarch64-4.7-branch up to r192191. Thanks Sofiane

[AARCH64-4.7] Merge from upstream gcc-4_7-branch r191881

Hi, I have just merged upstream gcc-4_7-branch on the aarch64-4.7-branch up to r191881. Thanks Sofiane

[AARCH64] Merge from upstream trunk r191882

Hi, I have just merged upstream trunk on the aarch64-branch up to r191882. Thanks Sofiane

[PATCH, WWWDOCS] Document AArch64-4.7 branch

Hi, This patch documents the AArch64-4.7 branch in wwwdocs/htdocs/svn.html. OK? Thanks Sofiane - Proposed ChangeLog: * htdocs/svn.html: Document aarch64-4.7 branch. aarch64-4.7-branch-wwwdocs.patch Description: Binary data

[AArch64] Merge from upstream trunk r191370

Hi, I have just merged upstream trunk on the aarch64-branch up to r191370. Thanks Sofiane

RE: [AArch64, AArch64-4.7] Fix target ordering in config.gcc.

Now with the patch properly attached. Apologies. Sofiane > -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Sofiane Naci > Sent: 13 September 2012 13:18 > To: gcc-patches@gcc.gnu.org > Subject: [AArch64

[AArch64, AArch64-4.7] Fix target ordering in config.gcc.

Hi, I've just committed the attached patch on the branches ARM/aarch64-branch ARM/aarch64-4.7-branch to fix the target ordering in supported_defaults in config.gcc. Thank you Sofiane

[AArch64] Merge from upstream trunk r191124

Hi, I have just merged upstream trunk on the aarch64-branch up to r191124. As a result, I have also updated the AArch64 backend with the attached patch. Thanks Sofiane aarch64-191124-rebase.patch Description: Binary data

[AARCH64] AArch64 backport to 4.7

[AARCH64] AArch64 backport to 4.7. This series of patches implements a back port of the AArch64 backend to gcc-4.7. This patch series is not intended to be applied directly to the gcc-4_7-branch branch. We have pushed a new branch into SVN to host this back port, located at: svn://gcc.gnu.

[AArch64] Merge from upstream trunk r190706

Hi, I've just merged upstream trunk on the aarch64-branch up to r190706. Thanks Sofiane

RE: [AARCH64] [PATCH 2/3] AArch64 Port

> -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Joseph S. Myers > Sent: 25 May 2012 15:24 > To: Marcus Shawcroft > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [AARCH64] [PATCH 2/3] AArch64 Port > > On Fri, 25 May 2012, Marcus

RE: [AARCH64] [PATCH 1/3] AArch64 Port

Hi, Thanks for the feedback. I respond here to the remaining issues: > > Index: gcc/doc/extend.texi > > === > > --- gcc/doc/extend.texi (revision 187870) > > +++ gcc/doc/extend.texi (working copy) > > @@ -935,7 +935,8 @@ > >

[AArch64] Do not mix statements with declarations

Hi, I've just committed the attached patch on the AArch64 branch to fix a style issue related to mixing statements with declarations. Thanks Sofiane - r190486 | sofiane | 2012-08-17 16:26:47 +0100 (Fri, 17 Aug 2012) | 7 lines 2012-08-17 Marcus Shawcroft [AArch64] Do not mix sta

[AArch64] implement FSQRT in RTL.

Hi, I've just committed the attached patch on the AArch64 branch to implement FSQRT in RTL. Thanks Sofiane - r190485 | sofiane | 2012-08-17 16:22:28 +0100 (Fri, 17 Aug 2012) | 12 lines 2012-08-17 Tejas Belagod [AArch64] Implement FSQRT in RTL. * config/aarch64/aarch64-

[AArch64] implement vmlsq_laneq_*

Hi, I've just committed the attached patch on the AArch64 branch to implement vmlsq_laneq_*. Thanks Sofiane - r190484 | sofiane | 2012-08-17 16:15:49 +0100 (Fri, 17 Aug 2012) | 11 lines Tejas Belagod [AArch64] Implement vmlsq_laneq_*. gcc/ * config/aarch64/arm_n

[AArch64] Use effective-target keyword to test for endianness

Hi, I've just committed the attached patch on the AArch64 branch to use effective-target keyword to test for endianness. Thanks Sofiane - r190482 | sofiane | 2012-08-17 16:02:20 +0100 (Fri, 17 Aug 2012) | 9 lines [AArch64] Use effective-target to check for big endian gcc/t

[AArch64] Add new testcases and improve diagnostics

Hi, I've just committed the attached patch on the AArch64 branch to add new testcases and improve diagnostics. Thanks Sofiane - r190481 | sofiane | 2012-08-17 15:53:50 +0100 (Fri, 17 Aug 2012) | 11 lines [AArch64] Add new testcases to improve diagnostics. gcc/ * co

[AArch64] Merge from upstream trunk r190154

Hi, I've just merged upstream trunk on the aarch64-branch up to r190335. Thanks Sofiane

[AArch64] Merge from upstream trunk r190154

Hi, I've just merged upstream trunk on the aarch64-branch up to r190154. Thanks Sofiane

[AArch64] Merge from upstream trunk r189905

Hi, I've just merged upstream trunk on the aarch64-branch up to r189905. Thanks Sofiane

[AArch64] Merge from upstream trunk reverted

Hi, I've just reverted my recent merge from upstream trunk on the aarch64-branch (r190119). A cleaner and broader merge will follow. Thanks Sofiane

[AArch64] Improve diagnostics

Hi, I've just committed this patch on the AArch64 branch to improve diagnostics and error messages. Thanks Sofiane > -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On > Behalf Of Sofiane Naci > Sent: 13 June 2012 14:30

[AArch64] Remove support for __float128

Hi, I've just committed this patch on the AArch64 branch to remove __float128 support. Thanks Sofiane > -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On > Behalf Of Sofiane Naci > Sent: 11 June 2012 15:52 > To: gcc

[AArch64] Fix bound check diagnostics.

Hi, I've just committed this patch on the AArch64 branch to improve bound checks diagnostics. Thanks Sofiane > -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On > Behalf Of Sofiane Naci > Sent: 14 June 2012 10:38

[PATCH, GCC][AArch64] Update LINK_SPEC

Hi, This patch updates LINK_SPEC in the AArch64 port. Thanks Sofiane - 2012-06-14 Sofiane Naci [AArch64] Update LINK_SPEC. * config/aarch64/aarch64-linux.h (LINUX_TARGET_LINK_SPEC): Remove %{version:-v}, %{b} and %{!dynamic-linker}. aarch64-linux-specs.patch

[PATCH, GCC][AArch64] Fix bound check diagnostics.

Hi, This patch improves bound check diagnostics code. Thanks Sofiane - 2012-06-13 Sofiane Naci [AArch64] Fix bound check diagnostics. * gcc/config/aarch64/aarch64.c (bounds_check): Remove. (aarch64_simd_lane_bounds): Replace call to bounds_check

RE: [PATCH, GCC][AArch64] Use Enums for code models option selection

Hi, I discovered a bug in my previous patch, so I attach a new one. The ChangeLog hasn't changed. OK to commit? Thanks Sofiane > -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On > Behalf Of Sofiane Naci > Sent: 31 Ma

[PATCH, GCC][AArch64] Fix diagnostics issues

Hi, This patch fixes some diagnostics wording and formatting issues in the AArch64 port. A patch that adds missing test cases for some of these diagnostics will be sent separately. Thanks Sofiane - 2012-06-11 Sofiane Naci [AArch64] Fix diagnosis issues. * config/aarch64

[PATCH, GCC][AArch64] Remove support for __float128

Hi, This patch removes __float128 support in the AArch64 port. Thanks Sofiane - gcc/ChangeLog: 2012-06-11 Sofiane Naci [AArch64] Remove __float128 support. * config/aarch64/aarch64.c (aarch64_mangle_type): Remove function. (aarch64_init_builtins

[PATCH, GCC DOC][AArch64] Fix layout in AArch64 target-specific documentation

Hi, This patch fixes several layout, formatting and wording issues in the AArch64 target-specific documentation. Thanks Sofiane - 2012-06-11 Sofiane Naci [AArch64] Fix documentation layout. * doc/invoke.texi: Fix white spaces after dots. Change aarch64

[PATCH, GCC][AArch64] Use Enums for TLS dialect option selection

Hi, This patch re-factors TLS dialect option selection in the AArch64 port to use the generic support for enumerated option arguments. Thanks Sofiane - 2012-06-01 Sofiane Naci [AArch64] Use Enums for TLS option selection. * config/aarch64/aarch64-opts.h (enum

[AArch64] Use snprintf instead sprintf

Hi, This patch replaces instances of sprintf with snprintf with sizeof(..) in the AArch64 port. It also fixes layout issues in the code it touches. Thanks Sofiane - ChangeLog 2012-06-01 Sofiane Naci [AArch64] Replace sprintf with snprintf. * config/aarch64

[PATCH, GCC][AArch64] Use Enums for code models option selection

: 2012-05-31 Sofiane Naci [AArch64] Use Enums for code models option selection. * config/aarch64/aarch64-elf-raw.h (AARCH64_DEFAULT_MEM_MODEL): Delete. * config/aarch64/aarch64-linux.h (AARCH64_DEFAULT_MEM_MODEL): Delete. * config/aarch64/aarch64-opts.h (enum