On 1/21/2025 11:37 AM, Richard Sandiford wrote:
Thanks for the update. LGTM with one trivial fix:
writes:
diff --git a/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc
b/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc
index ca721dd2c09..d8776a55230 100644
--- a/gcc/config/aarch64/aarch64-
your fault :)
I've spotted a couple more issues, noted below.
Ok for master?
Thanks,
Saurabh
---
[...]
diff --git a/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc
b/gcc/config/aarch64/aarch64-sve-builtins-shapes.cc
index ca721dd2c09..0f6d366b2d6 100644
--- a/gcc/config/aarch64/aarch
On 1/16/2025 8:44 AM, Richard Sandiford wrote:
Thanks for the update. Mostly LGTM, but some comments below:
writes:
diff --git a/gcc/config/aarch64/aarch64-sve2.md
b/gcc/config/aarch64/aarch64-sve2.md
index f8cfe08f4c0..0a1dc314f94 100644
--- a/gcc/config/aarch64/aarch64-sve2.md
+++ b/gcc
cc.gnu.org/pipermail/gcc-patches/2024-July/658015.html. Rebased
with master. Regression tested on aarch64-unknown-linux-gnu and found no
regressions.
Thanks for picking this up! The issues described below are of course not
your fault :)
Ok for master?
Thanks,
Saurabh
---
[...]
diff --git a/
On 11/7/2024 9:03 AM, Kyrylo Tkachov wrote:
Hi Saurabh,
On 6 Nov 2024, at 11:03, saurabh@arm.com wrote:
The AArch64 FEAT_FP8 extension introduces instructions for conversion
and scaling.
This patch introduces the following intrinsics:
1. vcvt{1|2}_{bf16|high_bf16|low_bf16}_mf8_fpm.
2
On 10/9/2024 5:26 PM, Richard Sandiford wrote:
writes:
+/*
+** amax_0_f16_m_tied1:
+** ...
+** famax z0\.h, p0/m, z0\.h, (z[0-9]+\.h)
Sorry to ask for another round, but: the "(" and ")" aren't needed.
They're used when something later in the regular expression sequence
needs to
On 10/8/2024 3:27 PM, Richard Sandiford wrote:
Saurabh Jha writes:
Thanks for the review. Wanted to clarify your comment:
On 10/8/2024 11:51 AM, Richard Sandiford wrote:
writes:
diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/amax_f16.c
b/gcc/testsuite/gcc.target/aarch64
for it in the compiler.
Many thanks,
Saurabh
Thanks,
Richard
Thanks for the reviews. I made the suggested change in the commit
message, committed, and pushed it:
https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=20ce363c557d6458ec3193ab4e7df760fbe34976
Thanks,
Saurabh
On 10/4/2024 10:09 AM, saurabh@arm.com wrote:
In
s")
+ (UNSPEC_COND_SMAX "smax")
+ (UNSPEC_COND_SMIN "smin")])
It would be good to keep the entries sorted alphabetically.
OK for trunk with that change; no need for another review.
I think the can go in now, independently of the rest
I just pushed it to the trunk.
Thanks,
Saurabh
On 9/20/2024 3:09 PM, Claudio Bantaloukas wrote:
The ACLE defines a new scalar type, __mfp8. This is an opaque 8bit types that
can only be used by fp8 intrinsics. Additionally, the mfloat8_t type is made
available in arm_neon.h and arm_sve.h as
. I don't have and SVE test
off the top of my head but have a look at
/gcc/testsuite/gcc.target/aarch64/simd/faminmax-codegen.c
for example.
Regards,
Saurabh
On 9/30/2024 5:26 PM, Soumya AR wrote:
This patch uses the FSCALE instruction provided by SVE to implement the
standard ld
On 9/18/2024 4:28 PM, saurabh@arm.com wrote:
From: Saurabh Jha
This is a revised version of this patch series:
https://gcc.gnu.org/pipermail/gcc-patches/2024-September/663204.html
The only new thing in both patches of this series are fixing directives
in test cases, replace /* { dg-do
On 9/20/2024 10:51 AM, Christophe Lyon wrote:
Hi Saurabh,
On 9/18/24 21:53, Saurabh Jha wrote:
Hi Wilco,
Thanks for the patch. This mostly looks good. Just added a couple
clarifications.
On 9/18/2024 8:17 PM, Wilco Dijkstra wrote:
v2: Add more testcase fixes.
The current copysign pattern
Hi Wilco,
Thanks for the patch. This mostly looks good. Just added a couple
clarifications.
On 9/18/2024 8:17 PM, Wilco Dijkstra wrote:
v2: Add more testcase fixes.
The current copysign pattern has a mismatch in the predicates and constraints -
operand[2] is a register_operand but also has a
Ping
On 9/3/2024 4:32 PM, saurabh@arm.com wrote:
From: Saurabh Jha
This series is a revised version of:
https://gcc.gnu.org/pipermail/gcc-patches/2024-August/661860.html.
The first patch of the series is updated to address these comments:
https://gcc.gnu.org/pipermail/gcc-patches/2024
Hi Kyrill,
On 8/8/2024 4:23 PM, Kyrylo Tkachov wrote:
Hi Saurabh,
On 7 Aug 2024, at 17:11, saurabh@arm.com wrote:
External email: Use caution opening links or attachments
The AArch64 FEAT_FAMINMAX extension is optional from Armv9.2-a and
mandatory from Armv9.5-a. It introduces
Hi Kyrill,
Thank you for the review. I have addressed all the comments here:
https://gcc.gnu.org/pipermail/gcc-patches/2024-August/658968.html
Thanks,
Saurabh
On 7/22/2024 12:57 PM, Kyrylo Tkachov wrote:
Hi Saurabh,
On 22 Jul 2024, at 13:39, saurabh@arm.com wrote:
External email: Use
quot; in the subject line.
Ok for master? I don't have commit access so can someone please commit
on my behalf?
Regards,
Saurabh
---
gcc/config/aarch64/aarch64-builtins.cc| 173 +-
gcc/config/aarch64/aarch64-builtins.h | 5 +-
.../aarch64/aarch64-option
Ping
On 2/19/2024 10:11 AM, Saurabh Jha wrote:
On 2/9/2024 2:57 PM, Richard Earnshaw (lists) wrote:
On 30/01/2024 17:07, Saurabh Jha wrote:
Hey,
Previously, this test was added to fix this bug:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337. However, it did
not check the compilation
On 2/9/2024 2:57 PM, Richard Earnshaw (lists) wrote:
On 30/01/2024 17:07, Saurabh Jha wrote:
Hey,
Previously, this test was added to fix this bug:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337. However, it did not check
the compilation options before using them, leading to errors
Ping. I also don't have commit access so can someone please commit on my behalf.
From: Saurabh Jha
Sent: Tuesday, January 30, 2024 5:07 PM
To: Richard Sandiford via Gcc-patches; Richard Sandiford; Kyrylo Tkachov;
Richard Earnshaw
Subject: [
?
Regards,
Saurabh
gcc/testsuite/ChangeLog:
* gcc.target/arm/pr112337.c: Check whether we can use the compilation
options before using them.
rb18229.patch
Description: rb18229.patch
On 12/1/2023 2:10 PM, Richard Earnshaw (lists) wrote:
On 01/12/2023 13:45, Christophe Lyon wrote:
On Fri, 1 Dec 2023 at 13:44, Richard Earnshaw (lists)
wrote:
On 01/12/2023 11:28, Saurabh Jha wrote:
Hey,
I introduced this test "gcc/testsuite/gcc.target/arm/mve/pr112337.c" in th
ypto-neon-fp-armv8/-mfloat-abi=hard:
gcc.target/arm/mve/pr112337.c (test for excess errors)
"""
Ok for trunk? I don't have commit access so could someone please commit on my
behalf?
Regards,
Saurabh
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/pr112337.c: Fix the test
Hi Christophe,
On 11/20/2023 10:12 AM, Christophe Lyon wrote:
Hi Saurabh,
On Tue, 14 Nov 2023 at 15:51, Kyrylo Tkachov wrote:
Hi Saurabh,
-Original Message-
From: Saurabh Jha
Sent: Thursday, November 9, 2023 10:12 AM
To: gcc-patches@gcc.gnu.org; Richard Earnshaw
; Richard
Hey,
On 11/24/2023 8:42 AM, Saurabh Jha wrote:
Hey,
This patch enables FEAT_DEBUGv8p9 extension for AArch64 and adds its
system registers. FEAT_DEBUGv8p9 is default from Armv8.9-A Architecture.
Did regression testing for aarch64-none-elf target and found no
regressions.
Ok for master
ne to commit on
my behalf.
Regards,
Saurabh
From 5600438d1fb31cc9d0135b92dfe792906e9fac73 Mon Sep 17 00:00:00 2001
From: Saurabh Jha
Date: Tue, 21 Nov 2023 09:50:35 +
Subject: [PATCH] Enable Debug (DEBUGv8p9) extension for AArch64
---
gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l | 2 ++
lease commit on my
behalf?
Regards,
Saurabh
gcc/ChangeLog:
PR target/112337
* config/arm/arm.cc (mve_vector_mem_operand): Add a REG_P check for INC
and DEC operations
gcc/testsuite/ChangeLog:
PR target/112337
* gcc.target/arm/mve/pr112337.c: Test for
Hey,
This is causing an ICE. Bug here: 112337 � arm: ICE in arm_effective_regno
when compiling for MVE
(gnu.org)<https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337>
Regards,
Saurabh
From: Vladimir Makarov
Sent: Thursday, October 26, 2023 3:00 PM
T
On 10/6/2023 2:24 PM, Saurabh Jha wrote:
Hey,
This patch adds support for the Cortex-X4 CPU to GCC.
Regression testing for aarch64-none-elf target and found no regressions.
Okay for gcc-master? I don't have commit access so if it looks okay,
could someone please help me commit
Hey,
This patch adds support for the Cortex-X4 CPU to GCC.
Regression testing for aarch64-none-elf target and found no regressions.
Okay for gcc-master? I don't have commit access so if it looks okay,
could someone please help me commit this?
Thanks,
Saurabh
gcc/ChangeLog
* c
Hey,
This patch adds support for the Cortex-X4 CPU to GCC.
Regression testing for aarch64-none-elf target and found no regressions.
Okay for gcc-master? I don't have commit access so if it looks okay,
could someone please help me commit this?
Thanks, Saurabh
gcc/ChangeLog * c
verify
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