[COMMITTED] MAINTAINERS: Update my email address

Update my email address in the MAINTAINERS file. 2022-04-01 Qian Jianhua ChangeLog: * MAINTAINERS: Update my email address. --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index f388bdaf4f1..30f81b3dd52 100644 --- a

[COMMITTED] print-tree:Avoid warnings of overflow

This patch avoids two warnings of "'sprintf' may write a terminating nul past the end of the destination [-Wformat-overflow=]" when build GCC. Tested on x86_64, and committed as obvious. gcc/ChangeLog: * print-tree.cc: Change array length --- gcc/print-tree.cc | 4 ++-- 1 file changed,

[PATCH] Avoid a warning of overflow

This patch avoid a warning of "c-ada-spec.cc:1660:34: warning: 'sprintf' may write a terminating nul past the end of the destination [-Wformat-overflow=]" when build GCC. gcc/c-family/ * c-ada-spec.cc: Change array length --- gcc/c-family/c-ada-spec.cc | 2 +- 1 file changed, 1 inserti

[COMMITED][BACKPORT GCC9] aarch64: Add cpu cost tables for A64FX

This is a backport of adding cost tables for A64FX. 2021-02-23 Qian Jianhua gcc/ChangeLog: * config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New. * config/aarch64/aarch64.c (a64fx_addrcost_table): New. (a64fx_regmove_cost, a64fx_vector_cost): New

[COMMITED][BACKPORT GCC10] aarch64: Add cpu cost tables for A64FX

This is a backport of adding cost tables for A64FX. Bootstrapped and tested on aarch64-none-linux-gnu. 2021-02-23 Qian Jianhua gcc/ChangeLog: * config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New. * config/aarch64/aarch64.c (a64fx_addrcost_table): New

RE: [COMMITED] MAINTAINERS: Add myself for write after approval

> On Wed, Jan 13, 2021 at 02:45:19, Segher Boessenkool wrote: > > Hi! > > On Tue, Jan 12, 2021 at 03:44:22PM +0800, Qian Jianhua wrote: > > ChangeLog: > > > > 2021-01-12 Qian Jianhua > > > > * MAINTAINERS (Write After Approval): Add myself >

RE: [PATCH v2] aarch64: Add cpu cost tables for A64FX

Hi Richard > >> > ChangeLog: > >> > 2021-01-08 Qian jianhua > >> > > >> > gcc/ > >> > * config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New. > >> > * config/aarch64/aarch64.c (a64fx_addrcost_table): New. >

[COMMITED] MAINTAINERS: Add myself for write after approval

ChangeLog: 2021-01-12 Qian Jianhua * MAINTAINERS (Write After Approval): Add myself --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index c0aa23df57e..e88808f9fe2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -451,6 +451,7 @@ Daniel

RE: [PATCH v2] aarch64: Add cpu cost tables for A64FX

Hi Richard > -Original Message- > From: Richard Sandiford > Sent: Friday, January 8, 2021 7:04 PM > To: Qian, Jianhua/钱 建华 > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH v2] aarch64: Add cpu cost tables for A64FX > > Qian Jianhua writes: > > This p

[PATCH v2] aarch64: Add cpu cost tables for A64FX

This patch add cost tables for A64FX. ChangeLog: 2021-01-08 Qian jianhua gcc/ * config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New. * config/aarch64/aarch64.c (a64fx_addrcost_table): New. (a64fx_regmove_cost, a64fx_vector_cost): New. (a64fx_tunings

[PATCH v3] arm&aarch64: subdivide the type attribute "alu_shfit_imm"

Hi Richard Thanks for reviewing again. I have updated the patch to v3. Regards Qian > -Original Message- > From: Richard Sandiford > Sent: Tuesday, October 13, 2020 4:00 PM > To: Qian, Jianhua/钱 建华 > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH v2] arm&aarch

[PATCH v2] arm&aarch64: subdivide the type attribute "alu_shfit_imm"

Hi Richard Thanks for your comments. I have updated the patch. > -Original Message- > From: Richard Sandiford > Sent: Thursday, October 1, 2020 3:53 AM > To: Qian, Jianhua/钱 建华 > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH] arm&aarch64: subdiv

[PATCH] arm&aarch64: subdivide the type attribute "alu_shfit_imm"

The type attribute "alu_shfit_imm" is subdivided into "alu_shift_imm_lsl_1to4" and "alu_shift_imm_other", to accommodate optimazations of some microarchitectures. Here is the detailed discussion. https://gcc.gnu.org/pipermail/gcc/2020-September/233594.html Chan

[PATCH] aarch64: Add cpu cost tables for A64FX

This patch add cost tables for A64FX. ChangeLog: 2020-09-07 Qian jianhua gcc/ * config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New. * config/aarch64/aarch64.c (a64fx_addrcost_table): New. (a64fx_regmove_cost, a64fx_vector_cost): New. (a64fx_tunings

RE: [PATCH] fix testcase gcc.target/aarch64/insv_1.c

Hi Iain Iain Sandoe wrote: >Richard Sandiford wrote: >> "Qian, Jianhua" writes: >>> Hi Richard >>>  >>> I found that some instructions are using '#' before immediate value， >>> and others are not. For example >>>

RE: [PATCH] fix testcase gcc.target/aarch64/insv_1.c

lsl %1" [(set_attr "type" "mov_imm")] ) Are there any standards for this? Regards Qian -Original Message- From: Richard Sandiford Sent: Wednesday, August 26, 2020 6:09 PM To: Qian, Jianhua/钱 建华 Cc: gcc-patches@gcc.gnu.org Subject: Re: [PATCH] fix testcase gcc.ta

[PATCH] fix testcase gcc.target/aarch64/insv_1.c

There are three failures in gcc.target/aarch64/insv_1.c. FAIL: gcc.target/aarch64/insv_1.c scan-assembler bfi\tx[0-9]+, x[0-9]+, 0, 8 FAIL: gcc.target/aarch64/insv_1.c scan-assembler bfi\tx[0-9]+, x[0-9]+, 16, 5 FAIL: gcc.target/aarch64/insv_1.c scan-assembler movk\tx[0-9]+, 0x1d6b, lsl 32 This

RE: [PATCH] aarch64: Add A64FX machine model

Hi Richard Thank you very much. Richard Sandiford writes: >Hi Qian, > >"Qian, Jianhua" writes: >> Hi Richard >>  >>> Would you like the patch to be backported further than GCC 10? >> That is good if it could be backported to GCC9. > >Sure,

RE: [PATCH] aarch64: Add A64FX machine model

t;? If there is anything I can do, please let me know. Regards, Qian Richard Sandiford writes: >Qian Jianhua writes: >> This patch add support for Fujitsu A64FX, as the first step of adding >> A64FX machine model. >>  >> A64FX is used in FUJITSU Supercomputer PRIMEHPC FX

RE: [PATCH] aarch64: Add A64FX machine model

Hi Richard Thanks for your help. > Would you like the patch to be backported further than GCC 10? > Does the attached patch to document the addition to GCC 10.3 look OK? I will reply to you after the internal discussion. Regards, Qian Richard Sandiford writes: >Qian Jianhua writes

[PATCH] aarch64: Add A64FX machine model

. Changelog: 2020-08-03 Qian jianhua * config/aarch64/aarch64-cores.def: Add the chip name. * config/aarch64/aarch64-tune.md: Regenerated. * config/aarch64/aarch64.c: Add tuning table for the chip. * doc/invoke.texi: Add the new name to the list

[PATCH] Fix typo in the document of GCC Internals

Hi This patch fixes a typo in the document of GCC Internals. --- gcc/doc/generic.texi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/doc/generic.texi b/gcc/doc/generic.texi index 827c4232aef..fb98727928a 100644 --- a/gcc/doc/generic.texi +++ b/gcc/doc/generic.texi @@ -88