> > And based on the history of RISC-V port
> > (https://gcc.gnu.org/pipermail/gcc/2017-January/222595.html) the process
> > for a new port seems:
> >
> > 1. Get a permission from the Steering Committee.
> > 2. Add one or two port maintainers into MAINTAINERS file.
> > 3. Now the technical reviewin
>
> And based on the history of RISC-V port
> (https://gcc.gnu.org/pipermail/gcc/2017-January/222595.html) the process
> for a new port seems:
>
> 1. Get a permission from the Steering Committee.
> 2. Add one or two port maintainers into MAINTAINERS file.
> 3. Now the technical reviewing of the pat
Hi Mike,
Thanks for your review.
On Wed, Feb 16, 2022 at 12:30 PM Mike Stump via Gcc-patches
wrote:
>
> On Jan 28, 2022, at 5:49 AM, chenglulu wrote:
> >
> > gcc/testsuite/
> >
> >* g++.dg/cpp0x/constexpr-rom.C: Add build options for LoongArch.
> >* g++.old-deja/g++.abi/ptrmem.C
ping?
On Sat, Feb 12, 2022 at 11:12 AM wrote:
>
> From: Chenghua Xu
>
> Hi, all:
>
> This is the v7 version of LoongArch Port. Please review.
>
> We know it is stage4, I think it is ok for a new prot.
> The kernel side upstream waiting for a approval by gcc side,
> if it is blocked by stage4, a
ping ?
On Fri, Jan 28, 2022 at 9:50 PM chenglulu wrote:
>
> The LoongArch architecture (LoongArch) is an Instruction Set
> Architecture (ISA) that has a Reduced Instruction Set Computer (RISC)
> style.
> The documents are on
> https://loongson.github.io/LoongArch-Documentation/README-EN.html
>
>
Hi all,
Ping?
By the way, the LoongArch machine is already connected to the Cfarm
and will be announced soon.
You can login through ssh.
ssh -l your-cfarm-user-name -p 25469 114.242.206.180
On Fri, Dec 24, 2021 at 5:28 PM chenglulu wrote:
>
> The LoongArch architecture (LoongArch) is an Instru
Hi Ruoyao,
Thank you for your attention.
> GCC 12 development cycle is at stage 3 (general bugfixing) now. So a
> new port have to wait until stage 1 of GCC 13 begins (in mid 2022, I
> guess).
I know it is stage3, but we are a new target, it's ok for GCC 12.
Hi Joseph,
Thanks for your suggestion, Those macros can be removed, we will send
the v4 version soon.
Are there any problems in this series of patches?
In other words, What conditions are required for LoongArch back-end merged?
By the way, We are preparing the LoongArch machine to send to Cfarm
Looks good to me, but I have no right to approve.
On Wed, Jun 30, 2021 at 9:17 PM Xi Ruoyao wrote:
>
> Ping patch:
> https://gcc.gnu.org/pipermail/gcc-patches/2021-June/573213.html
>
> Status update: bootstrapped with BOOT_CFLAGS="-O3 -mmsa -mloongson-mmi"
> (it failed without the patch), and
> > This patch reduce reservation of model do not more than 10 cycles. The
> > memory of genautomata down to 1GB.
>
> How bad is the memory consumption before this change?
>
almost 2.4GB.
see bugzilla comment #4.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77510#c4
ping?
On Sun, Jul 12, 2020 at 2:27 PM Paul Hua wrote:
>
> From 589dbe8a1c2397bfafefa4e84abe5ec6e6798928 Mon Sep 17 00:00:00 2001
> From: Andrew Pinski
> Date: Wed, 12 Feb 2020 11:42:57 +
> Subject: [PATCH] MIPS: Fix __builtin_longjmp (PR 64242)
>
> The problem her
>From 589dbe8a1c2397bfafefa4e84abe5ec6e6798928 Mon Sep 17 00:00:00 2001
From: Andrew Pinski
Date: Wed, 12 Feb 2020 11:42:57 +
Subject: [PATCH] MIPS: Fix __builtin_longjmp (PR 64242)
The problem here is mips has its own builtin_longjmp
pattern and it was not fixed when expand_builtin_longjmp
w
Hi,
Thanks for explain that.
Add isa_rev=2 and -mfpxx to dg-options fix the fallout.
On Sun, Oct 6, 2019 at 8:03 PM Dragan Mladjenovic
wrote:
>
>
>
> On 06.10.2019. 08:43, Paul Hua wrote:
> > Hi:
> >
> > The testsuite has a typo in "dg-final scan-assembler&q
Hi:
The testsuite has a typo in "dg-final scan-assembler", s/mthc1/mtc1/.
On Fri, Oct 4, 2019 at 7:21 PM Dragan Mladjenovic
wrote:
>
> On 01.10.2019. 21:37, Jeff Law wrote:
> > On 9/25/19 1:16 AM, Dragan Mladjenovic wrote:
> >> From: "Dragan Mladjenovic"
> >>
> >> This fixes the issue by check
Hi,
The msa-fmadd.c fails on abi=64, the attached patch fixed by specify the abis.
spawn -ignore SIGHUP
/home/xuchenghua/GCC/test/gcc-r272929_obj/gcc/xgcc
-B/home/xuchenghua/GCC/test/gcc-r272929_obj/gcc/
/home/xuchenghua/GCC/gcc_git_trunk/gcc/testsuite/gcc.target/mips/msa-fmadd.c
-fno-diagnostics
ping ?
On Mon, May 6, 2019 at 4:34 PM Paul Hua wrote:
>
> The attached patch fix pr90357, bootstraped and regressed test on
> mips64el-linux-gnu target.
> Ok for commit ?
The attached patch fix pr90357, bootstraped and regressed test on
mips64el-linux-gnu target.
Ok for commit ?
From a3db8763ee8460a5f63c567d58624a985f9924ce Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Mon, 6 May 2019 16:14:56 +0800
Subject: [PATCH] [PATCH,MIPS] Skip forward src into next insn w
Hi,
The MIPS target run out of Mask in mips.opt, we are stage4, this
patch retrieve loongson-ext that haven't used yet for now. In next
stage1, I will rewrite those part use HOST_WIDE_INT or same thing like
that.
Ok for commit ?
2019-04-04 Chenghua Xu
gcc/
PR target/89623
Hi,
This is a updated version, Ok for commit?
On Thu, Jan 17, 2019 at 10:05 AM Paul Hua wrote:
>
> Hi Gerald,
>
> Updated version, please review.
>
> Thanks.
>
> On Mon, Jan 14, 2019 at 7:46 AM Gerald Pfeifer wrote:
> >
> > Hi Paul,
> >
> >
Hi Gerald,
Updated version, please review.
Thanks.
On Mon, Jan 14, 2019 at 7:46 AM Gerald Pfeifer wrote:
>
> Hi Paul,
>
> On Mon, 31 Dec 2018, Paul Hua wrote:
> > The attached patch mention Loongson 3a1000 3a2000 3a3000 2k1000 support
> > in gcc9.
>
> thanks for
ping?
On Mon, Dec 31, 2018 at 6:27 PM Paul Hua wrote:
>
> Hi Gerald,
>
> The attached patch mention Loongson 3a1000 3a2000 3a3000 2k1000 support in
> gcc9.
>
> ok for commit?
Hi Gerald,
patch send to here: https://gcc.gnu.org/ml/gcc-patches/2018-12/msg01785.html
thanks.
On Fri, Dec 28, 2018 at 12:50 AM Gerald Pfeifer wrote:
>
> Hi Paul and Matthew,
>
> I believe it would be good to get this and other MIPS changes covered
> in the GCC 9 release notes at https://gcc
Hi Gerald,
The attached patch mention Loongson 3a1000 3a2000 3a3000 2k1000 support in gcc9.
ok for commit?
Index: changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-9/changes.html,v
retrieving revision 1.30
diff -u -r1.30 changes
Hi:
Recently gcc optimize msa compare code i<5 from clti_.df $wn,$wn,5
to clei_.df $wn,$wn,4.
This patch adjusted testsuite.
Committed as obviously.
gcc/testsuite/
2018-12-05 Chenghua Xu
* gcc.target/mips/msa.c: Adjusted clti_.df $wn,$wn,5
to clei_.df $wn,$wn,4 in test31.
di
In some older Loongson3 processors there is a LL/SC errata that can
cause the CPU to deadlock occasionally. The details are very
complicated. We find a way to work around this errata by a) adding a
sync before ll/lld instruction, b) adding a sync
before branch target that between ll and sc. The as
On Wed, Nov 7, 2018 at 5:12 PM Paul Hua wrote:
>
> Hi, Matthew:
>
> I committed the patch. Thanks for your review.
>
After committed this patch some test failure under
with-arch=mips64r2(i only test under -with-arch=loongson3a).
664 FAIL: gcc.target/mips/insn-casesi.c -O0 (
sorry, i commits a wrong version patch. Fix the typo and bad logical
by commits attached patch.
On Wed, Nov 7, 2018 at 5:14 PM Paul Hua wrote:
>
> On Tue, Oct 16, 2018 at 10:50 AM Paul Hua wrote:
> >
> >
From 16a357d8f844e4bdc45bf385e98b8dc6c0723720 Mon Sep 17 00:00:00 2001
On Tue, Oct 16, 2018 at 10:50 AM Paul Hua wrote:
>
>
From 7ab0637b28b22bdb00e021692ceb8372855c8a87 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Wed, 7 Nov 2018 09:38:09 +0800
Subject: [PATCH 6/6] Add support for Loongson 2K1000 processor.
gcc/
* config/mips/gs264e.md: New.
* confi
On Tue, Oct 16, 2018 at 10:50 AM Paul Hua wrote:
>
>
From ef10d77f03e693299611e6b4eee2ae6375a5841d Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Tue, 6 Nov 2018 21:12:46 +0800
Subject: [PATCH 4/6] Add support for Loongson 3A1000 processor.
gcc/
* config/mips/loongson3a.md: Ren
On Tue, Oct 16, 2018 at 10:50 AM Paul Hua wrote:
>
>
From 51c914e8c2b2e4c7cc93718e563a8f55f0161ff9 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Wed, 7 Nov 2018 09:27:05 +0800
Subject: [PATCH 5/6] Add support for Loongson 3A2000/3A3000 processor.
gcc/
* config/mips/gs464e.md: New.
*
On Tue, Oct 16, 2018 at 10:50 AM Paul Hua wrote:
>
>
From 73a4aac5034307cf7369bb70fa407709502fffbf Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Fri, 31 Aug 2018 11:55:48 +0800
Subject: [PATCH 3/6] Add support for Loongson EXT2 instructions.
gcc/
* config/mips/mips-pr
On Tue, Oct 16, 2018 at 10:50 AM Paul Hua wrote:
>
>
From b1dfcb228934e3cde90f408056192ed7faff4417 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Tue, 6 Nov 2018 17:04:36 +0800
Subject: [PATCH 2/6] Add support for Loongson EXT instructions.
gcc/
* config/mips/mips.h (TARGET_CPU_CPP_BU
Hi, Matthew:
I committed the patch. Thanks for your review.
On Tue, Oct 16, 2018 at 10:50 AM Paul Hua wrote:
>
>
From f0e4191439f1dd212b766ea80852aad1919e4887 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Mon, 5 Nov 2018 16:34:50 +0800
Subject: [PATCH 1/6] Add support for loongs
ET_LOONGSON_EXT2)
> >+ return "pref\t%1, %a0";
> >+ /* Loongson 2[ef] and Loongson ext use load to $0 for prefetching.
> */
> > if (TARGET_64BIT)
> >-return "ld\t$0,%a0";
> >+ return "ld\t$0,%a0";
> &g
Ping ?
On Fri, Oct 26, 2018 at 5:50 PM Paul Hua wrote:
>
> Ping ?
>
> On Tue, Oct 23, 2018 at 9:16 AM Paul Hua wrote:
> >
> > Ping ?
> >
> > On Fri, Oct 19, 2018 at 2:19 PM Paul Hua wrote:
> > >
> > > Ping?
> > >
> >
Ping ?
On Tue, Oct 23, 2018 at 9:16 AM Paul Hua wrote:
>
> Ping ?
>
> On Fri, Oct 19, 2018 at 2:19 PM Paul Hua wrote:
> >
> > Ping?
> >
> > I'd like check in those patches before stage3.
> >
> > Thanks,
> >
> > On Tue, Oct 16,
memcpy-chk.c compilation, -Og -g
(internal compiler error)
FAIL: gcc.c-torture/execute/builtins/memcpy-chk.c compilation, -Os
(internal compiler error)
I filed a bug at https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87720.
Paul Hua
> I bisected at least one to this commit on aarch64:
>
Ping ?
On Fri, Oct 19, 2018 at 2:19 PM Paul Hua wrote:
>
> Ping?
>
> I'd like check in those patches before stage3.
>
> Thanks,
>
> On Tue, Oct 16, 2018 at 10:49 AM Paul Hua wrote:
> >
> > Hi:
> >
> > The original version of patches were
Ping?
I'd like check in those patches before stage3.
Thanks,
On Tue, Oct 16, 2018 at 10:49 AM Paul Hua wrote:
>
> Hi:
>
> The original version of patches were here:
> https://gcc.gnu.org/ml/gcc-patches/2018-09/msg00099.html
>
> This is a update version. please revie
From 55047aa22e40de2637fbab4b5e246dfc4ca191f8 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Mon, 3 Sep 2018 19:45:15 +0800
Subject: [PATCH 5/6] Add support for Loongson 3A2000/3A3000 proccessor.
gcc/
* config/mips/gs464e.md: New.
* config/mips/mips-cpus.def: Define gs464e.
* config/mips/mi
From 0df9c46bea628086ca2c4b5db24c28cec912d319 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Mon, 3 Sep 2018 20:01:54 +0800
Subject: [PATCH 6/6] Add support for Loongson 2K1000 proccessor.
gcc/
* config/mips/gs264e.md: New.
* config/mips/mips-cpus.def: Define gs264e.
* config/mips/mips-tabl
From 14eabf990f187631cacd47e02342941ddb1b04a0 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Fri, 31 Aug 2018 11:55:48 +0800
Subject: [PATCH 3/6] Add support for Loongson EXT2 istructions.
gcc/
* config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Define
__mips_loongson_ext2, __mips_loongson_ext_r
From ce950df0f918eb02d15c4287d21e3aecb43bf351 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Fri, 31 Aug 2018 14:08:01 +0800
Subject: [PATCH 4/6] Add support for Loongson 3A1000 proccessor.
gcc/
* config/mips/loongson3a.md: Rename to ...
* config/mips/gs464.md: ... here.
* config/mips/mips-
From e9d36eb4d4a841486ac82037497a2671481f8a27 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Sun, 14 Oct 2018 11:11:00 +0800
Subject: [PATCH 1/6] Add support for loongson mmi instructions.
gcc/
* config.gcc (extra_headers): Add loongson-mmiintrin.h.
* config/mips/loongson.md: M
From 2e053c832497892c6b8b1b685aaf871d8fc4da76 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Fri, 31 Aug 2018 11:52:33 +0800
Subject: [PATCH 2/6] Add support for Loongson EXT istructions.
gcc/
* config/mips/mips.c (mips_option_override): Default enable
Loongson EXT on Loongson 3a target.
*
o new regressions.
Ok for commit ?
Thanks,
Paul Hua
Hubicka behalf ?
Thanks
Paul Hua
-
2018-10-11 Jan Hubicka
PR target/87156
* cgraphclones.c (cgraph_node::create_version_clone_with_body):
Set new_decl virtual flag to zero.
diff --git a/gcc
Hi Terry,
Thanks for your comments.
>
> For the new files, I think the copyright year should be just 2018.
>
The loongson-mmi.md is a renamed file from loongson.md, I think the
copyright year should be include the old file.
But in gs464e.md and gs264e.md, the copyright years will be just 2018,
I
Hi Joseph,
On Tue, Sep 4, 2018 at 12:21 AM Joseph Myers wrote:
>
> Each patch adding a new command-line option needs to add documentation of
> that option to invoke.texi. As far as I can see the patches document new
> CPU names but not new options.
Thanks for catch that, The v2 patch added.
>
On Mon, Sep 3, 2018 at 8:32 PM Paul Hua wrote:
>
>
Hi:
The v2 patch add:
* gcc/doc/invoke.texi (-mloongson-ext2): Document.
Thanks
Paul Hua
From 6c20a2a9a61058ee7d97d0d01238514ed96b60fd Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Fri, 31 Aug 2018 11:55:48 +0800
Subject: [PATCH 3/6]
On Mon, Sep 3, 2018 at 8:37 PM Paul Hua wrote:
>
> sorry, it's should be [PATCH 2/6] not [PATCH 1/6] .
>
> On Mon, Sep 3, 2018 at 8:30 PM Paul Hua wrote:
> >
> >
Hi:
The v2 patch add:
* gcc/doc/invoke.texi (-mloongson-ext): Do
sorry, it's should be [PATCH 2/6] not [PATCH 1/6] .
On Mon, Sep 3, 2018 at 8:30 PM Paul Hua wrote:
>
>
From fbe1d77d63f6224126ff4cdfef439182265b1682 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Fri, 31 Aug 2018 11:52:33 +0800
Subject: [PATCH 2/6] [MIPS] Add support for Loongson EXT istructions.
gcc/
* config/mips/mips.c (mips_option_override): Default enable
Loongson EXT on Loongson 3a targ
From a33230a02948e614e9c5c3a310cf9bdd0968aefc Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Mon, 3 Sep 2018 20:01:54 +0800
Subject: [PATCH 6/6] [MIPS] Add support for Loongson 2K1000 proccessor.
gcc/
* config/mips/gs264e.md: New.
* config/mips/mips-cpus.def: Define gs264e.
* config/mips/mi
From 7c7599e473ef5a0e34c7ce192770eaaab7aa2efe Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Mon, 3 Sep 2018 19:45:15 +0800
Subject: [PATCH 5/6] [MIPS] Add support for Loongson 3A2000/3A3000 proccessor.
gcc/
* config/mips/gs464e.md: New.
* config/mips/mips-cpus.def: Define gs464e.
* config/
From 133e21aa8cd7a6f533840bf8255f8edd27543bb3 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Fri, 31 Aug 2018 14:08:01 +0800
Subject: [PATCH 4/6] [MIPS] Add support for Loongson 3A1000 proccessor.
gcc/
* config/mips/loongson3a.md: Rename to ...
* config/mips/gs464.md: ... here.
* config/mip
From 2871889515b9c7cc1af7bc93fe9e645b3adcd623 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Fri, 31 Aug 2018 11:55:48 +0800
Subject: [PATCH 3/6] [MIPS] Add support for Loongson EXT2 istructions.
gcc/
* config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Define
__mips_loongson_ext2, __mips_loongso
t-for-Loongson-3A2000-3A3000-proccess.patch
6) 0006-MIPS-Add-support-for-Loongson-2K1000-proccessor.patch
All patchs test under mips64el-linux-gnu no new regressions.
Ok for commit ?
Thanks,
Paul Hua
On Wed, Aug 22, 2018 at 2:15 AM Qing Zhao wrote:
>
>
> > On Aug 21, 2018, at 8:07 AM, Paul Hua wrote:
> >
> > Hi, Qing,
> >
> > The cfarm machine gcc23 can build mips64el successful, configure with
> > "../configure --prefix=/opt/gcc-9 MISSING=texin
ks a lot.
>
> Qing
> > On Aug 17, 2018, at 10:43 PM, Paul Hua wrote:
> >
> > Hi Qing:
> >
> >>
> >> the change has been committed as:
> >> https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=263563
> >> <https://gcc.gnu.o
li $6,3# 0x3
sd $31,8($sp)
.reloc 1f,R_MIPS_JALR,memcmp
1: jalr$25
daddiu $5,$5,%got_ofst(.LC0)
scan-assembler find "4" times.
Thanks
Paul Hua
Thanks for your comments, commited as r261538.
Paul Hua
On Tue, Jun 12, 2018 at 8:09 PM, Matthew Fortune wrote:
> Paul Hua writes:
>> The gcc.c-torture/execute/scal-to-vec1.c trigger a gcc ICE bug.
>>
>> It's a mistake in define_expand vec_setv4hi in loongson.md file
Hi:
The gcc.c-torture/execute/scal-to-vec1.c trigger a gcc ICE bug.
It's a mistake in define_expand vec_setv4hi in loongson.md file.
375 (define_expand "vec_setv4hi"
376 [(set (match_operand:V4HI 0 "register_operand" "=f")
377 (unspec:V4HI [(match_operand:V4HI 1 "register_operand" "f"
sb $0,0($4) # 9[c=4 l=2] *movqi_internal/5
...
The patch changs:
-/* { dg-final { scan-assembler
"\tsb\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*length = 2" } } */
+/* { dg-final { scan-assembler
"\tsb\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*l=2" } } */
Th
/* { dg-final { scan-assembler-times "[concat
{\tmult\t\$[45],\$[45][^\n]+mulsi3_r4000\n\tmflo\t\$2\n}]" 2 } } */
And also changes dg-final scan-assembler "mulditi3_r4000" instead of
"mulditi3" in fix-r4000-7.c.
changes dg-final scan-assembler "umulditi3_
Hi:
The fixits-pr84852-1.c fails on mips64el target.
FAIL: gcc.dg/fixits-pr84852-1.c (test for excess errors)
FAIL: gcc.dg/fixits-pr84852-1.c dg-regexp 25 not found:
".*fixits-pr84852.c:-812156810:25:"
see this patch:
diff --git a/gcc/testsuite/gcc.dg/fixits-pr84852-1.c
b/gcc/testsuite/gcc.dg/f
d add skip-if -O0 flags.
Paul Hua
On Thu, Nov 17, 2016 at 1:15 AM, Maciej W. Rozycki wrote:
> On Tue, 15 Nov 2016, Matthew Fortune wrote:
>
>> I'm a little concerned the expected output tests may be fragile over
>> time but let's wait and see.
>
> Indeed, b
dump-times vect "vectorized 1 loops in
function" 1 (found 0 times)
Because the MIPS paired single insns only support for float
operations, not suite for this test.
added dg-skip-if directives on it for skip -mpaired-single option.
Ok for commit ?
Paul Hua
ChangeLog entries:
gcc/tests
On Fri, Mar 9, 2018 at 10:51 PM, Bin.Cheng wrote:
> On Fri, Mar 9, 2018 at 10:25 AM, Paul Hua wrote:
>> It's looks fixed
>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82965#c12 on mips64el.
> Hmm, is it fixed? or is it exposed now on mips64el? I read the latter
>
It's looks fixed
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82965#c12 on mips64el.
Thanks.
On Mon, Feb 26, 2018 at 8:02 PM, Bin.Cheng wrote:
> Ping^2
>
> Thanks,
> bin
>
> On Mon, Feb 19, 2018 at 5:14 PM, Jakub Jelinek wrote:
>> Hi!
>>
>> Honza, do you think you could have a look at this P1
Hi Jakub:
It's introduce a regression on mips target.
see https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84623.
Paul hua
On Thu, Feb 8, 2018 at 6:36 AM, Jakub Jelinek wrote:
> Hi!
>
> Unfortunately, seems my rest_of_insert_endbranch fix doesn't fix
> -fcompare-debug on the
e gcc/testsuite/gcc.target/mips/near-far-3.c
> patching file gcc/testsuite/gcc.target/mips/near-far-4.c
>
> On Sat, Sep 09, 2017 at 11:26:57AM +0800, Paul Hua wrote:
>> I would like to testing your patch on mips64el target. but your patch
>> can't apply to current trunk.
normal_func\n" } } */
--
Could you give a new patch?
Thanks,
Paul Hua.
On Thu, Sep 7, 2017 at 7:22 PM, Simon Atanasyan wrote:
> This is a ping for a small MIPS specific patch adds `short_call`
> synonym for e
New "ERROR: (DejaGnu)" on mips64el target.
my DejaGnu version is 1.5.1.
1)
make check-gcc RUNTESTFLAGS="tree-ssa.exp=builtin-sprintf-2.c"
...
ERROR: (DejaGnu) proc "^:\\" does not exist.
The error code is TCL LOOKUP COMMAND ^:\\
The info on the error is:
invalid command name "^:\"
while execu
>
> [ Paul Hua sent a patch adding split_stack already, it was OKed, but
> it is not committed yet, fwiw ].
>
I saw this, so not commit my patch.
Paul.
Hi:
tree-prof/split-1.c use -fsplit-stack in dg-options but not check is
ok for target.
This patch add "dg-require-effective-target split_stack" for it.
Ok for commit ?
Paul.
ChangeLog
2017-06-11 Chenghua Xu
* gcc.dg/tree-prof/split-1.c: Require split_stack support.
diff --git
Commited as r248868.
Thanks.
Paul.
On Mon, Jun 5, 2017 at 4:41 AM, Matthew Fortune
wrote:
> Hi Paul,
>
> Paul Hua writes:
>> cc: Matthew.
>>
>> ping.
>
> Sorry a little slow on the reply.
>
>> On Thu, Jun 1, 2017 at 3:35 PM, Paul Hua wrote:
>>
cc: Matthew.
ping.
On Thu, Jun 1, 2017 at 3:35 PM, Paul Hua wrote:
> Hi,
>
> There are duplicate testcase in gcc.target/mips dir.
>
> div-5.c same as div-9.c.
> div-6.c same as div-10.c.
> div-7.c same as div-11.c.
> div-8.c same as div-12.c.
>
> Is this deliberat
Hi,
There are duplicate testcase in gcc.target/mips dir.
div-5.c same as div-9.c.
div-6.c same as div-10.c.
div-7.c same as div-11.c.
div-8.c same as div-12.c.
Is this deliberate?
Otherwise, the attached patch fixing this.
Paul.
***ChangeLog***
2017-06-01Chenghua Xu
Remove duplica
Hi,
On mips64el target:
New Fail:
FAIL: gfortran.dg/pr48636.f90 -O scan-ipa-dump fnsummary "inline
hints: loop_iterations"
Paul
On Wed, May 24, 2017 at 4:47 PM, Christophe Lyon
wrote:
> Hi,
>
> On 23 May 2017 at 18:23, Jan Hubicka wrote:
>> Hi,
>> this patch finishes the breakup of ipa-inli
Hi:
commited as r248137.
Thanks,
paul.
On Wed, May 17, 2017 at 2:46 AM, Toma Tabacu wrote:
> From: Jeff Law
>> On 05/16/2017 10:01 AM, Toma Tabacu wrote:
>>> Hello Paul,
>>>
>>> You're seeing this problem because mips.exp can't handle -O* in dg-options.
>>> The other tests in gcc.target/mips us
Hi:
There are new failures between r248067 and r248036 on
mips64el-unknown-linux-gnu.
ERROR: gcc.target/mips/reorgbug-1.c -O0 : Unrecognised option: -O2
for " dg-options 1 "-O2 -msoft-float -mips2" "
UNRESOLVED: gcc.target/mips/reorgbug-1.c -O0 : Unrecognised
option: -O2 for " dg-options
On aarch64 target the result are 1.332268e-17.
On x86 with fma target the result are also 1.332268e-17.
so, I don't think the Loongson's madd.fmt/msub.fmt is incorrect.
We should do something for usage of fused madd, the all things has
been tested an fedora21 remix for loongson(1).
1, gcc：add lo
Hi,
> +On MIPS targets, set the @option{-mno-unfused-madd4} option by default.
> +On some platform, like Loongson 3A/3B 1000/2000/3000, madd.fmt/msub.fmt is
> +broken, which may which may generate wrong calculator result.
The Loongson 3A/3B 1000/2000/3000 madd.fmt/msub.fmt are fused madd instruct
Hi all,
I committed the attached patch, adding myself to the Write After Approval.
committed as r243789.
thanks,
paul
Index: ChangeLog
===
--- ChangeLog (revision 243788)
+++ ChangeLog (revision 243789)
@@ -1,3 +1,7 @@
+2016-12-19 C
> Hi Jeff,
>
> Am I OK to accept this change without copyright assignment from Paul?
>
> The change is small and there is no other way it could be implemented
> anyway if I had someone write it from scratch.
>
> Thanks,
> Matthew
>
>> -----Original Messag
ping...
On Thu, Nov 3, 2016 at 7:58 PM, Paul Hua wrote:
> Hi Matthew,
>
> Thanks for your comments, update the patch.
>
> *** gcc/ChangeLog ***
>
> 2016-11-03 Chenghua Xu
>
> * config/mips/mips.h (ISA_HAS_FUSED_MADD4): Enable for
&
:31 PM, Matthew Fortune
wrote:
> Paul Hua writes:
>> Loongson3a has 4 operand fused madd instrcution. This patch set
>> loongson3a use fused madd.d.
>
> Hi Paul,
>
> Thanks for the fix. I was vaguely aware that this was wrong for
> loongson-3a but never confirmed it
Hi,
Loongson3a has 4 operand fused madd instrcution. This patch set
loongson3a use fused madd.d.
ChangeLog :
*** gcc/ChangeLog ***
2016-11-03 Chenghua Xu
config/mips/
* mips.h: Set loongson3a use fused madd.d.
Tested on loongson3a.
PS: I will soon submit some patches, how can i
I am wrong, I lost the sta16() in mips dsp manual.
Hi,
There are some mistakes in mips dsp testsuite.
This patch fixing it.
Ok to commit?
[mips] Fix mips dsp testsuite mistake.
gcc/testsuite/gcc.target/mips/
*mips32-dsp-run.c: Fix mistake.
Index: gcc/testsuite/ChangeLog
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