ure tests? Could such a test verify the emitted assembly (like LLVM’s
FileCheck tests do)? Or would it need to execute something?
Thanks for your help!
Matt
> On Sep 26, 2021, at 11:45 PM, Matt Jacobson wrote:
>
> Fix protocol list layout for non-LP64. clang and objc4 both give the `count`
> field as `long`, not `intptr_t`. Those are the same on LP64, but not
> everywhere. For non-LP64, this fixes binary compatibility w
.
Thank you for your time.
<https://github.com/mhjacobson/gcc/commit/5ebc95dc726f0745ebdf003093f1b8d7720ce32f>
gcc/objc/ChangeLog:
2021-09-26 Matt Jacobson
* objc-next-runtime-abi-02.c (enum objc_v2_tree_index): Add new global
tree.
(static void next_runtime_02_init
mit/8193903a1d5a1569a6799174e13cb22925f1f428>
gcc/objc/ChangeLog:
2021-09-26 Matt Jacobson
* objc-next-runtime-abi-02.c (build_v2_class_templates): Remove explicit
padding on non-LP64.
(build_v2_class_ro_t_initializer): Remove initialization of explicit
padding on
tps://github.com/mhjacobson/gcc/commit/917dc8bb2f3265c2ca899ad750c5833b0161a11e>
I don't have commit access, so if this patch is suitable, I'd need someone else
to commit it for me. Thanks.
gcc/objc/ChangeLog:
2021-09-21 Matt Jacobson
* objc-next-runtime-abi-02.c (struct cla
in the process added
-fobjc-nilcheck to the compiler invocation in objc-torture.exp. Let me know
what you think.
I’m not sure what you mean w.r.t. Objective-C++ -- can you explain?
gcc/testsuite/ChangeLog:
2021-08-14 Matt Jacobson
PR objc/101666
* lib/objc-torture.exp: T
frontend against the example in PR101666 and inspecting
the generated code.
I don't have commit access, so if this patch is suitable, I'd need someone else
to commit it for me. Thanks.
gcc/objc/ChangeLog:
2021-08-14 Matt Jacobson
PR objc/101666
* objc-next-runt
> On Aug 3, 2021, at 2:39 PM, Iain Sandoe wrote:
>
>
>
>> On 2 Aug 2021, at 22:37, Matt Jacobson via Gcc-patches
>> wrote:
>>
>>> On Aug 2, 2021, at 5:09 PM, Eric Gallager wrote:
>>>
>>> On Wed, Jul 28, 2021 at 11:36 PM Matt
> On Aug 2, 2021, at 5:09 PM, Eric Gallager wrote:
>
> On Wed, Jul 28, 2021 at 11:36 PM Matt Jacobson via Gcc-patches
> wrote:
>>
>> As is, an invocation of GCC with -fnext-runtime -fobjc-abi-version=2 crashes,
>> unless target-specific code adds an implicit -f
meone else
to commit it for me. Thanks.
gcc/objc/ChangeLog:
2021-07-28 Matt Jacobson
* objc-next-runtime-abi-02.c (objc_next_runtime_abi_02_init): Warn
about and reset flag_objc_sjlj_exceptions regardless of
flag_objc_exceptions.
gcc/c-family/ChangeLog:
2021-0
> On Jul 5, 2021, at 7:09 PM, Matt Jacobson wrote:
>
>> On Jun 7, 2021, at 3:30 AM, Matt Jacobson wrote:
>>
>> The AVR target builds a lot of multilib variants of target libraries by
>> default,
>> and I found myself wanting to use the --with-multilib-
> On Jun 7, 2021, at 3:30 AM, Matt Jacobson wrote:
>
> The AVR target builds a lot of multilib variants of target libraries by
> default,
> and I found myself wanting to use the --with-multilib-list argument to limit
> what I was building, to shorten build times. This pat
AVR compiler and target libs on macOS.
I don't have commit access, so if this patch is suitable, I'd need someone else
to commit it for me. Thanks.
gcc/ChangeLog:
2020-06-07 Matt Jacobson
* config.gcc: For the AVR target, populate TM_MULTILIB_CONFIG.
*
On Tue, Sep 24, 2019 at 1:24 AM Kyrill Tkachov
wrote:
>
> Hi Matt,
>
> On 9/24/19 5:04 AM, Matt Turner wrote:
> > When -march=native is passed to host_detect_local_cpu to the backend,
> > it overrides all command lines after it. That means
> >
> > $ gcc -ma
When -march=native is passed to host_detect_local_cpu to the backend,
it overrides all command lines after it. That means
$ gcc -march=native -march=armv8-a
is treated as
$ gcc -march=armv8-a -march=native
Prune joined switches with Negative and RejectNegative to allow
-march=armv8-a to overri
When -march=native is passed to host_detect_local_cpu to the backend,
it overrides all command lines after it. That means
$ gcc -march=native -march=armv8-a
is treated as
$ gcc -march=armv8-a -march=native
Prune joined switches with Negative and RejectNegative to allow
-march=armv8-a to overri
On Sun, Jun 18, 2017 at 10:56 AM, Uros Bizjak wrote:
> On Fri, Jun 16, 2017 at 11:42 PM, Matt Turner wrote:
>> Currently -march=native selects -march=broadwell on Kaby Lake systems,
>> since its model numbers are missing from the switch statement. It falls
>> back to the def
gcc/
* config/i386/driver-i386.c (host_detect_local_cpu): Assume
skylake for unknown models with clflushopt.
---
gcc/config/i386/driver-i386.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index 09faad0af0e..570
Currently -march=native selects -march=broadwell on Kaby Lake systems,
since its model numbers are missing from the switch statement. It falls
back to the default case and chooses -march=broadwell because of the
presence of the ADX instruction set.
gcc/
* config/i386/driver-i386.c (host_de
Hello, Honza. David Li said you might be able to help me get this
patch into GCC trunk. I sent mail for this on August 27, but didn't
get a reply. It's a small change to make these two options work
together:
profile-func-internal-id=0 coverage-callback=1
Let me know what I can do to get this s
This patch is for svn://gcc.gnu.org/svn/gcc/branches/google/gcc-4_9. I add
support for the profile_func_internal-id in the instrumentation generated for
__coverage_callback.
Add support for the profile-func-internal-id parameter to the coverage callback.
Without this change, the function identifi
> On Jun 29, 2015, at 8:19 AM, James Greenhalgh
> wrote:
>
> Now that this has had a few days sitting on trunk without seeing any
> complaints, would you mind if I backported it to the GCC 5 branch?
I don’t have a problem with that.
ad is going to get rid of these SUBREGs
>> for us, so we don't need to modify the output statement.
>>
>> Tested that this restores the VAX build and that the code-gen is
>> sensible for the testcase.
>>
>> OK?
>
> Looks good to me, but Matt has to ACK this fix.
I so ACK.
sable-sjlj-exceptions --with-dwarf2" still suffers the same
issues. Building with simply "--with-dwarf2" instead, however, now
works fine. I'm not sure whether or not a bug has been created for it
and if one needs to be.
Much appreciated,
Matt
On Wed, May 13, 2015 at 6:36 AM, Jona
On Nov 23, 2013, at 11:23 AM, Mike Stump wrote:
> Richi has asked the we break the wide-int patch so that the individual port
> and front end maintainers can review their parts without have to go through
> the entire patch.This patch covers the vax port.
>
> Ok?
OK.
On Sep 20, 2013, at 9:58 AM, Jan-Benedict Glaw wrote:
> Hi!
>
> VAX GAS has a glitch when generating a 64bit value from a small
> negative integer, which isn't properly sign-extended. (I'll see if
> this can be fixed without breaking other cases.)
>
> However, GCC should work around this by si
On Sep 13, 2013, at 4:21 AM, Jan-Benedict Glaw wrote:
> On Wed, 2013-07-31 18:34:26 +0200, Jan-Benedict Glaw
> wrote:
>> We've seen ICEs while outputting an operand (not even the excessive
>> CISC of a VAX could do that), which should be fixed by this patch:
>>
>> 2013-07-31 Jan-Benedict Gla
On Wed, 2013-05-22 at 15:13 -0700, Ian Lance Taylor wrote:
> On Wed, May 22, 2013 at 2:41 PM, Matt Burgess
> wrote:
> >
> > 2013-05-22 Matt Burgess
> >
> > other/PR56780
> > * libiberty/configure.ac: Move test for --enable-install-
Hi Ian,
Thanks for the review. Here's v2, which I think addresses both of your
comments.
Kind Regards,
Matt.
2013-05-22 Matt Burgess
other/PR56780
* libiberty/configure.ac: Move test for --enable-install-libiberty
outside of the 'with_target_subdir'
Hi,
Is anyone able to review the below please (original patch attached to
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56780 and first posted at
http://gcc.gnu.org/ml/gcc-patches/2013-04/msg00167.html
Thanks,
Matt.
On Wed, 2013-04-03 at 15:03 +0100, Matt Burgess wrote:
> Hi,
>
> Pl
Hi,
Please find attached a patch that fixes PR56780. Build tested on
x86_64-linux. I've also attached it to the bug.
Regards,
Matt Burgess
2013-04-03 Matt Burgess
other/PR56780
* libiberty/configure.ac:
Move test for --enable-install-libiberty outside o
2013-02-22 Matt Turner
gcc/
* doc/invoke.texi: Document r4700.
---
gcc/doc/invoke.texi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 7d96467..63eb6a6 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc
http://gcc.gnu.org/svnwrite.html to get the ball rolling?
On Thu, Feb 14, 2013 at 11:53 AM, Matt Hargett wrote:
On Feb 14, 2013, at 10:40 AM, Xinliang David Li wrote:
On Thu, Feb 14, 2013 at 10:18 AM, Matt wrote:
The attached patches do two things:
1. Backports a fix from trunk that eliminates
On Feb 14, 2013, at 10:40 AM, Xinliang David Li wrote:
> On Thu, Feb 14, 2013 at 10:18 AM, Matt wrote:
>> The attached patches do two things:
>> 1. Backports a fix from trunk that eliminates bogus warning traces. On my
>> current codebase which links ~40MB of C++ with L
On Tue, Jun 26, 2012 at 7:56 AM, nick clifton wrote:
> Hi Matt,
>
>
>> There's also a trivial documentation fix:
>>
>> [PATCH 1/2] doc: Correct __builtin_arm_tinsr prototype documentation
>>
>> and a test to exercise the intrinsics:
>>
>> [
cc/c-parser.c
+++ gcc/c-parser.c
- VEC(tree,gc) *origtypes;
+ VEC(tree,gc) *origtypes = NULL;
--
tangled strands of DNA explain the way that I behave.
http://www.clock.org/~matt
On Sep 29, 2012, at 8:08 AM, Segher Boessenkool wrote:
>> The following proposed patch disables setting, saving and restoring
>> the VRSAVE register on all targets except Darwin.
>>
>> VRSAVE was removed from the AIX ABI and was suppose to have been
>> removed from the PPC SVR4 ABI. All recent
On Tue, Jun 26, 2012 at 10:56 AM, nick clifton wrote:
> Hi Matt,
>
>
>> There's also a trivial documentation fix:
>>
>> [PATCH 1/2] doc: Correct __builtin_arm_tinsr prototype documentation
>>
>> and a test to exercise the intrinsics:
>>
>> [
t these to 4_7-branch as well? (One of the
patches looks relevant to 4.6 as well, and applied cleanly, but I haven't
tested to see if it had a noticeable effect.)
Thanks again!
--
tangled strands of DNA explain the way that I behave.
http://www.clock.org/~matt
On Wed, Jun 13, 2012 at 3:26 AM, nick clifton wrote:
> Hi Matt, Hi Xinyu,
>
>
>> This series was written by Marvell and sent by Xinyu Qi
>> a number of times in the last year.
>
>
> Sorry for the long delay in reviewing these patches. Overall they were
>
On Jun 5, 2012, at 6:46 AM, Paolo Bonzini wrote:
>> Do we always have CTZ if we have FFS? Can't there be a target that
>> implements FFS as opcode but not CTZ, so you'd slow down things?
>> Thus, should the transform be conditonal on target support for CTZ
>> or no target support for FFS?
>
> H
The R4700 is identical to the R4600 except for the integer and
floating-point multiplication costs.
See page 4 of http://datasheets.chipdb.org/IDT/MIPS/79RV4700.pdf
2012-03-24 Matt Turner
gcc/
* config/mips/4600.md (r4700_imul_si): New.
(r4700_imul_di): New
On Thu, May 31, 2012 at 5:35 PM, Richard Sandiford
wrote:
> Matt Turner writes:
>> On Sat, Feb 25, 2012 at 3:11 AM, Richard Sandiford
>> wrote:
>>> Matt Turner writes:
>>>> The r4600_imul and r4600_idiv reservations were correct for si, but
>>>>
From: Xinyu Qi
gcc/
* config/arm/arm.c (enum arm_builtins): Revise built-in fcode.
(IWMMXT2_BUILTIN): New define.
(IWMMXT2_BUILTIN2): Likewise.
(iwmmx2_mbuiltin): Likewise.
(builtin_description bdesc_2arg): Revise built in declaration.
(buil
From: Xinyu Qi
gcc/
* config/arm/mmintrin.h: Use __IWMMXT__ to enable iWMMXt intrinsics.
Use __IWMMXT2__ to enable iWMMXt2 intrinsics.
Use C name-mangling for intrinsics.
(__v8qi): Redefine.
(_mm_cvtsi32_si64, _mm_andnot_si64, _mm_sad_pu8): Revise.
From: Xinyu Qi
gcc/
* config/arm/arm.c (FL_IWMMXT2): New define.
(arm_arch_iwmmxt2): New variable.
(arm_option_override): Enable use of iWMMXt with VFP.
Disable use of iWMMXt with NEON. Disable use of iWMMXt under
Thumb mode. Set arm_arch_iwmmxt2.
From: Xinyu Qi
gcc/
* config/arm/t-arm (MD_INCLUDES): Add marvell-f-iwmmxt.md.
* config/arm/marvell-f-iwmmxt.md: New file.
* config/arm/arm.md (marvell-f-iwmmxt.md): Include.
---
gcc/config/arm/arm.md |1 +
gcc/config/arm/marvell-f-iwmmxt.md | 17
torvsc to the "wtype" attribute)
Please commit them for 4.8.
For 4.7 and 4.6 please consider committing my patch
"[PATCH] arm: Fix iwmmxt shift and logical intrinsics (PR 35294)."
which only fixes the logical and shift intrinsics.
Thanks,
Matt Turner
On Wed, Apr 4, 2012 at 2:34 PM, Matt Turner wrote:
> 2012-04-04 Matt Turner
>
> gcc/
> * doc/extend.texi (__builtin_arm_tinsrb): Add missing second
> parameter.
> (__builtin_arm_tinsrh): Likewise.
> (__builtin_arm_tinsrw): Likewise.
>
On Fri, Feb 24, 2012 at 10:53 PM, Matt Turner wrote:
> PR 36798 and 36966 are duplicates.
>
> 2012-02-24 Matt Turner
>
> PR target/35294
> * config/arm/arm.c (arm_expand_builtin): Wire up missing
> intrinsics.
> ---
>
On Tue, Feb 28, 2012 at 7:13 PM, Ramana Radhakrishnan
wrote:
> On Fri, Feb 24, 2012 at 10:53:35PM -0500, Matt Turner wrote:
>> The x86/amd64 mmintrin.h provides the _mm_empty intrinsic for the 'emms'
>> MMX instruction. Although ARM does not need such an instruction, we
&
On Fri, Feb 24, 2012 at 10:53 PM, Matt Turner wrote:
> See section 2.5.3 (page 28) of
> http://download.majix.org/dec/comp_guide_v2.pdf
>
> 2012-02-24 Matt Turner
>
> * config/alpha/ev6.md: (define_bypass "ev6_fmul,ev6_fadd"): New.
> (define_bypass
On Sat, Feb 25, 2012 at 3:11 AM, Richard Sandiford
wrote:
> Matt Turner writes:
>> The r4600_imul and r4600_idiv reservations were correct for si, but
>> there were no *_di reservations.
>>
>> See page 4 of
>> http://www.sgistuff.net/hardware/other/documents/R
On Thu, Apr 5, 2012 at 4:53 AM, Ramana Radhakrishnan
wrote:
> On 4 April 2012 19:35, Matt Turner wrote:
>> gcc/testsuite/gcc.target/arm/mmx-2.c | 158
>> ++
>> 1 files changed, 158 insertions(+), 0 deletions(-)
>> create mode 1006
On Thu, May 3, 2012 at 12:59 AM, Xinyu Qi wrote:
>> From: Matt Turner [mailto:matts...@gmail.com]
>> To: Xinyu Qi
>> Cc: Ramana Radhakrishnan; GCC Patches
>> Subject: Re: [PING] iwMMXt patches
>>
>> On Tue, Apr 17, 2012 at 4:17 PM, Matt Turner wrote:
>&
On Tue, Apr 17, 2012 at 4:17 PM, Matt Turner wrote:
> Are these patches ready to go in? It looks like they were ack'd.
>
> http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01815.html
> http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01817.html
> http://gcc.gnu.org/ml/gcc-patches/2
http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01819.html
We (OLPC) will need these patches for reasonable iwMMXt performance
and the ability to use VFP and iwMMXt together.
Thanks,
Matt
2012-04-04 Matt Turner
PR target/35294
* gcc.target/arm/mmx-2.c: New.
---
This patch and 1/2 are tie-ons to
http://gcc.gnu.org/ml/gcc-patches/2012-02/msg01269.html
Still waiting on copyright assignment, but please review in the meantime.
Is there anything else I need to do to
2012-04-04 Matt Turner
gcc/
* doc/install.texi: Correct typo "-mno-lsc" -> "-mno-llsc".
---
Still waiting on copyright assignment, but I think this doc patch
is trivial enough to be committed without it.
gcc/doc/install.texi |2 +-
1 files chan
2012-04-04 Matt Turner
gcc/
* doc/extend.texi (__builtin_arm_tinsrb): Add missing second
parameter.
(__builtin_arm_tinsrh): Likewise.
(__builtin_arm_tinsrw): Likewise.
---
This patch and 2/2 are tie-ons to
http://gcc.gnu.org/ml/gcc-patches/2012-02
The x86/amd64 mmintrin.h provides the _mm_empty intrinsic for the 'emms'
MMX instruction. Although ARM does not need such an instruction, we
should provide an empty _mm_empty function nonetheless for source
compatibility.
2012-02-24 Matt Turner
* config/arm/mmintrin.h (_mm_e
PR 36798 and 36966 are duplicates.
2012-02-24 Matt Turner
PR target/35294
* config/arm/arm.c (arm_expand_builtin): Wire up missing
intrinsics.
---
gcc/config/arm/arm.c | 62 +-
1 files changed, 61 insertions(+), 1
The R4700 is identical to the R4600 except for the integer and
floating-point multiplication costs.
See page 4 of http://datasheets.chipdb.org/IDT/MIPS/79RV4700.pdf
2012-02-24 Matt Turner
* config/mips/4600.md (r4700_imul_si): New.
(r4700_imul_di): New
See section 2.5.3 (page 28) of
http://download.majix.org/dec/comp_guide_v2.pdf
2012-02-24 Matt Turner
* config/alpha/ev6.md: (define_bypass "ev6_fmul,ev6_fadd"): New.
(define_bypass "ev6_fcmov"): New.
---
gcc/config/alpha/ev6.md |4
1 files c
I've missed
a step or didn't format the ChangeLog entries properly, and so forth.
Please CC me on replies.
Thanks,
Matt Turner
The r4600_imul and r4600_idiv reservations were correct for si, but
there were no *_di reservations.
See page 4 of
http://www.sgistuff.net/hardware/other/documents/R4600_Prod_OV.pdf
2012-02-24 Matt Turner
* config/mips/4600.md (r4600_imul_si): Rename from r4600_imul
Hi,
> Martin, do you plan to have this pushed in for GCC 4.7?
well, there were two patches. I have managed to update and push
trough one of them in time
(http://gcc.gnu.org/ml/gcc-patches/2011-11/msg00086.html) but
unfortunately I have not managed to do the same with the second one.
It's rec
On Sat, 29 Oct 2011, Maxim Kuvyrkov wrote:
I like this variant a lot better than the last one - still it lacks any
analysis-based justification for iteration (see my reply to Matt on
what I discussed with Honza).
Yes, having a way to tell whether a function have significantly changed
would
ion was discovered on a given bottom-up
pass, move onto the next analysis.
Thanks again for taking the time to work through this!
--
tangled strands of DNA explain the way that I behave.
http://www.clock.org/~matt
sulted in
improved performance over a single pass -- just not necessarily a smaller
binary.
--
tangled strands of DNA explain the way that I behave.
http://www.clock.org/~matt
--- arm.c.orig 2011-05-05 04:39:40.0 -0400
+++ arm.c 2011-08-19 13:48:21.548405102 -0400
@@ -19218,7 +19218,8 @@
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
target = gen_reg_rtx (tmode);
- gcc_assert (GET_MODE (op0) == mode0 && GET_MODE (op1) == mod
2011/6/14 Sharad Singhai (शरद सिंघई) :
> Sorry, Rietveld didn't send out the updated patch along with my mail.
> Here it is.
>
Hi, I tried this patch out on trunk it applies alright, and appears to
work fine, (haven't run the testsuite though) any plans on submitting
it for inclusion with mainline
On Fri, Aug 19, 2011 at 2:09 AM, Xinyu Qi wrote:
> At 2011-08-19 12:18:10,"Matt Turner" wrote:> Subject: Re:
>>
>> On Fri, Aug 19, 2011 at 12:13 AM, Matt Turner wrote:
>> > Hi,
>> >
>> > Attached is a patch based on gcc-4.6.1 that wires-up
On Fri, Aug 19, 2011 at 12:13 AM, Matt Turner wrote:
> Hi,
>
> Attached is a patch based on gcc-4.6.1 that wires-up missing ARM
> iwmmxt intrinsics. Without it, gcc is completely useless when it comes
> to using a large portion of the intrinsics documented on this page:
>
/log/?h=iwmmxt-optimizations
I have seen much more extensive patches from Xinyu Qi, but I do not
suppose that they will be available in gcc 4.6.
Thanks,
Matt Turner
--- arm.c.orig 2011-08-19 00:03:06.163195724 -0400
+++ arm.c 2011-08-19 00:03:10.872195933 -0400
@@ -157,7 +157,7 @@
static void
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