Several typos have been found and fixed: missing semicolons, using
variable name instead of type, duplicate functions and wrong types.
gcc/ChangeLog:
* doc/extend.texi(__lsx_vabsd_di): remove extra `i' in name.
(__lsx_vfrintrm_d, __lsx_vfrintrm_s, __lsx_vfrintrne_d,
__lsx_
Several typos have been found and fixed: missing semicolons, using
variable name instead of type and wrong types.
gcc/ChangeLog:
* doc/extend.texi(__lsx_vabsd_di): remove extra `i' in name.
(__lsx_vfrintrm_d, __lsx_vfrintrm_s, __lsx_vfrintrne_d,
__lsx_vfrintrne_s, __lsx_vf
LoongArch32 only provides basic ll/sc instructions for atomic
operations. Mark am* atomic instructions as 64-bit only.
gcc/ChangeLog:
* config/loongarch.sync.md: Guard am* atomic insns by
TARGET_64BIT.
---
gcc/config/loongarch/sync.md | 10 +-
1 file changed, 5 insertions
In LoongArch, signed DF->DI conversion can be done if -mfpu=64 and
-march=loongarch32.
gcc/ChangeLog:
* config/loongarch/loongarch.md (fix_trunc*2): Use ANYFI instead
of GPR because it depends on fpu width instead of target bits.
---
gcc/config/loongarch/loongarch.md | 8
LoongArch32 does not include LDX/STD instructions, and cannot lower
(plus (reg) (reg)) pattern. Forbid ADDRESS_REG_REG and do not emit
ldx/stx.
gcc/ChangeLog:
* config/loongarch/loongarch.cc (loongarch_valid_index_p): Check
ADDRESS_REG_REG pattern and fail in loongarch32.
The correct ilp32 macro name is __loongarch_ilp32.
libitm/ChangeLog:
* config/loongarch/asm.h: Fix ilp32 detection.
---
libitm/config/loongarch/asm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libitm/config/loongarch/asm.h b/libitm/config/loongarch/asm.h
index 39
The compiler emits a warning if the current target (-march=loongarch32)
mismatches with abi(-march=lp64d). Adding: Add -march=loongarch64
explicitly fixes the tests.
gcc/testsuite/ChangeLog:
* g++.target/loongarch/bytepick.C: Add -march=loongarch64
* g++.target/loongarch/pr106828.
The current SF/DF -> unsigned DI expand rules require iordi3 insn which
is not available in loongarch32.
gcc/ChangeLog:
* config/loongarch/loongarch.md (fixuns_truncdfdi2): Add
TARGET_64BIT to condition.
(fixuns_truncsfdi2): Add TARGET_64BIT to condition.
---
gcc/config/l
When rhs equals to 0x7fff, adding 1 to rhs overflows SI, generating
invalid const_int.
gcc/ChangeLog:
* config/loongarch/loongarch.cc (loongarch_emit_int_compare):
Call trunc_int_mode to ensure valid rhs.
---
gcc/config/loongarch/loongarch.cc | 1 +
1 file changed, 1 insertio
Add TARGET_64BIT check for loongarch64-only handling of SI division. It
shall not promote SI to DI before division in loongarch32 target.
gcc/ChangeLog:
* config/loongarch/loongarch.md: Add TARGET_64BIT check for
loongarch64-only handling of SI division.
---
gcc/config/loongarch/
loongarch_move_integer does not support splitting 64-bit integer into
two 32-bit ones. Thus, define_split is removed from movdi_32bit and
TARGET_64BIT is added to the split condition of movdi_64bit to avoid
using it for loongarch32.
gcc/ChangeLog:
* config/loongarch/loongarch.md (movdi_32
According to latest loongarch procedure call standard, sizeof(long
double) == 128 in ilp32 data model regardless of target bitness.
gcc/ChangeLog:
* config/loongarch/loongarch.h: Set LONG_DOUBLE_TYPE_SIZE to 128
regardless of target bitness.
---
gcc/config/loongarch/loongarch.h |
Introduce loongarch32 target and ilp32 abi variants. The ilp32d abi
variant is selected as the default abi of loongarch32 target.
Currently, ilp32 abi can only be used for loongarch32, but in the
future, it might be possible to use ilp32 abi for loongarch64.
contrib/ChangeLog:
* config-l
The operand order of movgr2frh.w was wrong. The correct order should be
`movgr2frh.w fd, rj`.
gcc/ChangeLog:
* config/loongarch/loongarch.md (movgr2frh): Correct
movgr2frh.w operand order.
---
gcc/config/loongarch/loongarch.md | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Bring back 64-bit move splitting for loongarch32. The code was removed
in commit 16fc26d4e7a (`LoongArch: Support split symbol.`) for unknown
reason.
gcc/ChangeLog:
* config/loongarch/loongarch.md: Handle move splitting for
64-bit operands.
---
gcc/config/loongarch/loongarch.md |
When loongarch_arch_target is called, la_target has not been
initialized, thus the macro LARCH_ACTUAL_ARCH always equals to zero.
This commit fixes by expanding the macro and reading the latest value.
It permits -march=loongarch64 when the default target is loongarch32 and
vice versa.
gcc/ChangeL
generation for loongarch32
Full changes:
Jiajie Chen (14):
LoongArch: Introduce loongarch32 target
LoongArch: Fix default ISA setting
LoongArch: Fix SI division for loongarch32 target
LoongArch: Fix movgr2frh.w operand order
LoongArch: Fix 64-bit move for loongarch32 target
LoongArch: Fix
loongarch_move_integer does not support splitting 64-bit integer into
two 32-bit ones. Thus, define_split is removed from movdi_32bit and
TARGET_64BIT is added to the split condition of movdi_64bit to avoid
using it for loongarch32.
gcc/ChangeLog:
* config/loongarch/loongarch.md (movdi_32
The compiler emits a warning if the current target (-march=loongarch32)
mismatches with abi(-march-lp64d). Adding: Add -march=loongarch64
explicitly fixes the tests.
gcc/testsuite/ChangeLog:
* g++.target/loongarch/bytepick.C: Add -march=loongarch64
* g++.target/loongarch/pr106828.
Bring back 64-bit move splitting for loongarch32. The code was removed
in commit 16fc26d4e7a (`LoongArch: Support split symbol.`) for unknown
reason.
gcc/ChangeLog:
* config/loongarch/loongarch.md: Handle move splitting for
64-bit operands.
---
gcc/config/loongarch/loongarch.md
Introduce loongarch32 target and ilp32 abi variants. The ilp32d abi
variant is selected as the default abi of loongarch32 target.
contrib/ChangeLog:
* config-list.mk: Add loongarch32-linux-gnu*.
gcc/ChangeLog:
* config.gcc: Add target triple loongarch32-*-*-* and
corre
In loongarch32 target, conversions between SF/DF and DI are not
supported.
gcc/ChangeLog:
* config/loongarch/loongarch.md: Check TARGET_64BIT in insns
regarding SF/DF <-> DI conversion.
---
gcc/config/loongarch/loongarch.md | 8
1 file changed, 4 insertions(+), 4 delet
When rhs equals to 0x7fff, adding 1 to rhs overflows SI, generating
invalid const_int.
gcc/ChangeLog:
* config/loongarch/loongarch.cc (loongarch_emit_int_compare):
Call trunc_int_mode to ensure valid rhs.
---
gcc/config/loongarch/loongarch.cc | 1 +
1 file changed, 1 insert
When loongarch_arch_target is called, la_target has not been
initialized, thus the macro LARCH_ACTUAL_ARCH always equals to zero.
This commit fixes by expanding the macro and reading the latest value.
It permits -march=loongarch64 when the default target is loongarch32 and
vice versa.
gcc/ChangeL
Add TARGET_64BIT check for loongarch64-only handling of SI division. It
shall not promote SI to DI before division in loongarch32 target.
gcc/ChangeLog:
* config/loongarch/loongarch.md: Add TARGET_64BIT check for
loongarch64-only handling of SI division.
---
gcc/config/loongarc
The operand order of movgr2frh.w was wrong. The correct order should be
`movgr2frh.w fd, rj`.
gcc/ChangeLog:
* config/loongarch/loongarch.md (movgr2frh): Correct
movgr2frh.w operand order.
---
gcc/config/loongarch/loongarch.md | 2 +-
1 file changed, 1 insertion(+), 1 deletion(
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