[PATCH v3] RISC-V: Add minimal support of double trap extension 1.0

-ext.def: New extensions * config/riscv/riscv-ext.opt: Auto re-generated gcc/testsuite/ChangeLog: * gcc/testsuite/gcc.target/riscv/arch-57.c: New test * gcc/testsuite/gcc.target/riscv/arch-58.c: New test Signed-off-by: Jerry Zhang Jian --- gcc/config/riscv/riscv-ext.def | 26

Re: [PATCH v2] RISC-V: Add minimal support of double trap extension 1.0

I think I found the bug that caused the test failure, and will send v3 later. BRs Jerry Jerry Zhang Jian 於 2025年5月25日 週日 下午11:05寫道： > Add support of double trap extension [1], enabling GCC > to recognize the following extensions at compile time. > > New extensions: >

[PATCH v2] RISC-V: Add minimal support of double trap extension 1.0

-ext.def: New extensions * config/riscv/riscv-ext.opt: Auto re-generated gcc/testsuite/ChangeLog: * gcc/testsuite/gcc.target/riscv/arch-57.c: New test * gcc/testsuite/gcc.target/riscv/arch-58.c: New test Signed-off-by: Jerry Zhang Jian --- gcc/config/riscv/riscv-ext.def | 26

[PATCH] RISC-V: Add minimal support of double trap extension 1.0

-ext.def: New extensions gcc/testsuite/ChangeLog: * gcc/testsuite/gcc.target/riscv/arch-56.c: New test * gcc/testsuite/gcc.target/riscv/arch-57.c: New test Signed-off-by: Jerry Zhang Jian --- gcc/config/riscv/riscv-ext.def | 26 gcc/testsuite/gcc.target/riscv

[PATCH v4] RISC-V: Fix missing implied Zicsr from Zve32x

rv64im_zve32x instead of rv64gc_zve32x to avoid Zicsr implied by g. Extra m is added to avoid current 'V' extension requires 'M' extension Signed-off-by: Jerry Zhang Jian --- gcc/common/config/riscv/riscv-common.cc| 1 + gcc/testsuite/gcc.target/ri

[PATCH v3] RISC-V: Fix missing implied Zicsr from Zve32x

rv64i_zve32x instead of rv64gc_zve32x to avoid Zicsr implied by g Signed-off-by: Jerry Zhang Jian --- gcc/common/config/riscv/riscv-common.cc| 1 + gcc/testsuite/gcc.target/riscv/predef-19.c | 34 ++ 2 files changed, 4 insertions(+), 31 deletions(-) diff --git a/gcc

[PATCH v2] RISC-V: Fix missing implied Zicsr from Zve32x

rv64i_zve32x instead of rv64gc_zve32x to avoid Zicsr implied by g, add -c to avoid multilib not supported in the test time Signed-off-by: Jerry Zhang Jian --- gcc/common/config/riscv/riscv-common.cc| 1 + gcc/testsuite/gcc.target/riscv/predef-19.c | 34 ++ 2

[PATCH] RISC-V: Fix missing implied Zicsr from Zve32x

rv64i_zve32x instead of rv64gc_zve32x to avoid Zicsr implied by g Signed-off-by: Jerry Zhang Jian --- gcc/common/config/riscv/riscv-common.cc| 1 + gcc/testsuite/gcc.target/riscv/predef-19.c | 22 +++--- 2 files changed, 4 insertions(+), 19 deletions(-) diff --git a/gcc

[PATCH] RISC-V: skip vector tests if target not supporting v extension

nsion The test cases under g[cc|++].dg/vect/vect.exp will be skipped on rv64gc after this patch gcc/testsuite/ChangeLog: * lib/target-supports.exp: skip vector tests if target not supporting v extension Signed-off-by: Jerry Zhang Jian --- gcc/testsuite/lib/target-supports.exp | 5 +--